{"id":"https://openalex.org/W4286571898","doi":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830182","title":"SoIC_H Technology for Heterogenous System Integration","display_name":"SoIC_H Technology for Heterogenous System Integration","publication_year":2022,"publication_date":"2022-06-12","ids":{"openalex":"https://openalex.org/W4286571898","doi":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830182"},"language":"en","primary_location":{"id":"doi:10.1109/vlsitechnologyandcir46769.2022.9830182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830182","pdf_url":null,"source":{"id":"https://openalex.org/S4363605407","display_name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047585341","display_name":"Chuei-Tang Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chuei-Tang Wang","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077232797","display_name":"Chia-Chai Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Chai Lin","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017056699","display_name":"Chih-Hsin Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chih-Hsin Lu","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100687506","display_name":"Wei\u2010Ting Chen","orcid":"https://orcid.org/0000-0002-4785-6784"},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Ting Chen","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019622249","display_name":"Chung-Hao Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Hao Tsai","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110022863","display_name":"Douglas Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210120917","display_name":"Taiwan Semiconductor Manufacturing Company (Taiwan)","ror":"https://ror.org/02wx79d08","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210120917"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Douglas C. H. Yu","raw_affiliation_strings":["Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Taiwan Semiconductor Manufacturing Company Ltd,Pathfinding for System Integration,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I4210120917"]},{"raw_affiliation_string":"Pathfinding for System Integration, Taiwan Semiconductor Manufacturing Company Ltd, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I4210120917"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210120917"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"258","last_page":"259"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.783004879951477},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6212254166603088},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6046234965324402},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5842438340187073},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5450809001922607},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4749308228492737},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4306320250034332},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42697829008102417},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3415372371673584},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25071507692337036},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1788894534111023},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07861238718032837}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.783004879951477},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6212254166603088},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6046234965324402},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5842438340187073},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5450809001922607},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4749308228492737},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4306320250034332},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42697829008102417},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3415372371673584},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25071507692337036},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1788894534111023},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07861238718032837},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsitechnologyandcir46769.2022.9830182","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830182","pdf_url":null,"source":{"id":"https://openalex.org/S4363605407","display_name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8899999856948853,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W2109451123","https://openalex.org/W4378977321","https://openalex.org/W1976168335","https://openalex.org/W3211992815","https://openalex.org/W179354024"],"abstract_inverted_index":{"An":[0],"SoIC_H":[1],"technology":[2,27],"for":[3,38,54,69,81],"2.5D":[4],"heterogeneous":[5],"system":[6,26],"integration":[7],"is":[8,14],"proposed.":[9],"SoIC":[10],"bond,":[11],"replacing":[12],"\u00b5bump,":[13],"used":[15],"to":[16],"provide":[17],"low":[18],"parasitic":[19],"and":[20,42,45,51,65,73,76],"high":[21],"density":[22],"of":[23],"interconnects.":[24],"Through":[25],"co-optimization":[28],"(STCO),":[29],"the":[30],"proposed":[31],"architecture":[32],"provides":[33],"over":[34],"60%":[35],"power":[36],"reduction":[37],"die-to-die":[39],"I/O":[40],"link":[41],"81%,":[43],"14%,":[44],"94%":[46],"reductions":[47,68],"in":[48],"energy,":[49],"latency,":[50],"area,":[52],"respectively,":[53],"on-chip":[55],"fanout":[56],"design.":[57],"For":[58],"memory":[59],"cubes,":[60],"it":[61],"introduces":[62],"61%":[63],"latency":[64],"49%":[66],"energy":[67,78],"4-Hi":[70],"SRAM":[71],"cache":[72],"30%":[74],"bandwidth":[75],"28%":[77],"efficiency":[79],"improvements":[80],"12-Hi":[82],"HBM.":[83]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}