{"id":"https://openalex.org/W2025098880","doi":"https://doi.org/10.1109/vlsisoc.2010.5642696","title":"Unifying stream based and reconfigurable computing to design application accelerators","display_name":"Unifying stream based and reconfigurable computing to design application accelerators","publication_year":2010,"publication_date":"2010-09-01","ids":{"openalex":"https://openalex.org/W2025098880","doi":"https://doi.org/10.1109/vlsisoc.2010.5642696","mag":"2025098880"},"language":"en","primary_location":{"id":"doi:10.1109/vlsisoc.2010.5642696","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2010.5642696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005531124","display_name":"Bruno Francisco","orcid":"https://orcid.org/0009-0006-0252-7780"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Bruno Francisco","raw_affiliation_strings":["INESC ID/IST-TU Lisbon, Lisboa, Portugal","INESC-ID/IST TULisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC ID/IST-TU Lisbon, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID/IST TULisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078717814","display_name":"Frederico Pratas","orcid":null},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Frederico Pratas","raw_affiliation_strings":["INESC ID/IST-TU Lisbon, Lisboa, Portugal","INESC-ID/IST TULisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC ID/IST-TU Lisbon, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID/IST TULisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077537777","display_name":"Leonel Sousa","orcid":"https://orcid.org/0000-0002-8066-221X"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Leonel Sousa","raw_affiliation_strings":["INESC ID/IST-TU Lisbon, Lisboa, Portugal","INESC-ID/IST TULisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC ID/IST-TU Lisbon, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]},{"raw_affiliation_string":"INESC-ID/IST TULisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5005531124"],"corresponding_institution_ids":["https://openalex.org/I121345201"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09673057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"408","last_page":"413"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10015","display_name":"Genomics and Phylogenetic Studies","score":0.9873999953269958,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9872000217437744,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8550615310668945},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.7451914548873901},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7209758758544922},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6107656955718994},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.5949243307113647},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5725120306015015},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5339917540550232},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5244422554969788},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5221827030181885},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.5178235173225403},{"id":"https://openalex.org/keywords/cuda","display_name":"CUDA","score":0.5125107765197754},{"id":"https://openalex.org/keywords/graphics-processing-unit","display_name":"Graphics processing unit","score":0.5033115744590759},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.45437926054000854},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3710302710533142},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21469047665596008},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17331770062446594}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8550615310668945},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.7451914548873901},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7209758758544922},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6107656955718994},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.5949243307113647},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5725120306015015},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5339917540550232},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5244422554969788},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5221827030181885},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.5178235173225403},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.5125107765197754},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.5033115744590759},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.45437926054000854},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3710302710533142},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21469047665596008},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17331770062446594},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsisoc.2010.5642696","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2010.5642696","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1853545769","https://openalex.org/W2040819538","https://openalex.org/W2102424972","https://openalex.org/W2117752525","https://openalex.org/W2120428067","https://openalex.org/W2124790653","https://openalex.org/W2125359798","https://openalex.org/W2143076415","https://openalex.org/W2146058063","https://openalex.org/W2168363137","https://openalex.org/W6638943096"],"related_works":["https://openalex.org/W2119534391","https://openalex.org/W2503137108","https://openalex.org/W1966576946","https://openalex.org/W2023770367","https://openalex.org/W2062253548","https://openalex.org/W2393490604","https://openalex.org/W2393707426","https://openalex.org/W3203633922","https://openalex.org/W2765743988","https://openalex.org/W2146871484"],"abstract_inverted_index":{"To":[0],"facilitate":[1],"the":[2,10,13,18,31,37,58,84,88,91,94,108,112,132,144,156],"design":[3,73],"of":[4,12,20,107],"hardware":[5,115,127],"accelerators":[6],"we":[7,48,71,97],"have":[8],"proposed":[9,59],"adoption":[11],"stream-based":[14,109],"computing":[15],"model":[16,29],"and":[17,39,74,77,93,96,124],"usage":[19],"Graphics":[21],"Processing":[22],"Units":[23],"(GPUs)":[24],"as":[25,87],"prototyping":[26],"platforms.":[27],"This":[28],"exposes":[30],"maximum":[32],"data":[33],"parallelism":[34],"available":[35],"in":[36,53,121],"applications":[38],"decouples":[40],"computation":[41],"from":[42],"memory":[43],"accesses.":[44],"In":[45,69],"this":[46],"paper":[47],"go":[49],"a":[50,63],"step":[51],"further":[52],"showing":[54],"how":[55],"to":[56,61,118,130,137],"use":[57],"methodology":[60],"accelerate":[62],"widely":[64],"used":[65],"MrBayes":[66],"bioinformatics":[67,146],"application.":[68],"particular,":[70],"provide":[72,98],"implementation":[75,85],"procedures":[76],"details.":[78],"We":[79],"analyze":[80],"problems":[81],"faced":[82],"during":[83],"such":[86],"connectivity":[89],"between":[90],"CPU":[92],"FPGA":[95],"possible":[99],"solutions.":[100],"Experimental":[101],"results":[102],"show":[103],"that":[104,139],"our":[105],"mapping":[106],"program":[110],"for":[111],"GPU":[113],"into":[114],"structures":[116],"leads":[117],"real":[119],"improvements":[120],"performance,":[122],"scalability":[123],"cost.":[125],"The":[126],"accelerator":[128],"allows":[129],"reduce":[131],"respective":[133],"processing":[134],"time":[135],"up":[136],"more":[138],"two":[140],"hundred":[141],"times":[142],"while":[143],"whole":[145],"application":[147],"can":[148],"run":[149],"1.44":[150],"faster":[151],"than":[152],"by":[153],"using":[154],"only":[155],"host.":[157]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}