{"id":"https://openalex.org/W2123489960","doi":"https://doi.org/10.1109/vlsisoc.2007.4402474","title":"Transparent acceleration of data dependent instructions for general purpose processors","display_name":"Transparent acceleration of data dependent instructions for general purpose processors","publication_year":2007,"publication_date":"2007-10-01","ids":{"openalex":"https://openalex.org/W2123489960","doi":"https://doi.org/10.1109/vlsisoc.2007.4402474","mag":"2123489960"},"language":"en","primary_location":{"id":"doi:10.1109/vlsisoc.2007.4402474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078952423","display_name":"Antonio Carlos Schneider Beck","orcid":"https://orcid.org/0000-0002-4492-1747"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Antonio Carlos Schneider Beck","raw_affiliation_strings":["Instituto de Inform\u00e1tica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil","[Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Inform\u00e1tica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"[Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil]","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062358729","display_name":"Luigi Carro","orcid":"https://orcid.org/0000-0002-7402-4780"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luigi Carro","raw_affiliation_strings":["Instituto de Inform\u00e1tica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil","[Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Inform\u00e1tica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"[Instituto de Informatica, Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil]","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.8428,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.71305657,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"66","last_page":"71"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8732966184616089},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6700109839439392},{"id":"https://openalex.org/keywords/binary-translation","display_name":"Binary translation","score":0.6626043915748596},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6332041025161743},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5295729637145996},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.4827558398246765},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44224807620048523},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.4222947657108307},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.4116833508014679},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3648080825805664},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.18626785278320312},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1541229486465454}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8732966184616089},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6700109839439392},{"id":"https://openalex.org/C2778971978","wikidata":"https://www.wikidata.org/wiki/Q2287075","display_name":"Binary translation","level":3,"score":0.6626043915748596},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6332041025161743},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5295729637145996},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.4827558398246765},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44224807620048523},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.4222947657108307},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.4116833508014679},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3648080825805664},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.18626785278320312},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1541229486465454},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsisoc.2007.4402474","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402474","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W9780072","https://openalex.org/W1686420892","https://openalex.org/W1906952654","https://openalex.org/W2006428566","https://openalex.org/W2080241541","https://openalex.org/W2098129944","https://openalex.org/W2112833506","https://openalex.org/W2115294662","https://openalex.org/W2120414993","https://openalex.org/W2129192659","https://openalex.org/W2138946897","https://openalex.org/W2140156318","https://openalex.org/W2142490124","https://openalex.org/W2155668132","https://openalex.org/W2157074753","https://openalex.org/W2158745536","https://openalex.org/W2611703827","https://openalex.org/W4232751114"],"related_works":["https://openalex.org/W1511601046","https://openalex.org/W2357657342","https://openalex.org/W2393399808","https://openalex.org/W2356606588","https://openalex.org/W2004028290","https://openalex.org/W2156845254","https://openalex.org/W2379188298","https://openalex.org/W2137453077","https://openalex.org/W4380634810","https://openalex.org/W2020775548"],"abstract_inverted_index":{"Although":[0],"transistor":[1],"scaling":[2],"keeps":[3],"following":[4],"Moore\u2019s":[5],"law,":[6],"and":[7,17,75,106,182],"more":[8],"area":[9,183],"is":[10,66],"available":[11],"for":[12,114],"designers,":[13],"the":[14,23,46,70,82,111,162,168,173],"clock":[15],"frequency":[16],"ILP":[18],"rate":[19],"do":[20,79],"not":[21,80],"present":[22],"same":[24],"level":[25],"of":[26,55,72,84,117,142],"growth":[27],"anymore.":[28],"This":[29],"way,":[30],"new":[31,99],"architectural":[32],"alternatives":[33],"are":[34],"necessary.":[35],"Reconfigurable":[36],"fabric":[37],"appears":[38],"to":[39,110,121,132,147],"be":[40,122],"one":[41],"emerging":[42],"possibility:":[43],"besides":[44],"exploiting":[45],"parallelism":[47],"among":[48],"instructions,":[49],"it":[50],"can":[51,139],"also":[52],"accelerate":[53],"sequences":[54,116],"data":[56],"dependent":[57],"ones.":[58],"However,":[59],"coarse":[60],"grain":[61],"reconfiguration":[62],"wide":[63],"spread":[64],"usage":[65],"still":[67],"withhold":[68],"by":[69],"need":[71],"special":[73],"tools":[74],"compilers,":[76],"which":[77],"clearly":[78],"sustain":[81],"reuse":[83],"legacy":[85],"code":[86,152],"without":[87,158],"any":[88,159],"modification.":[89],"Based":[90],"on":[91,124],"all":[92],"these":[93],"facts,":[94],"this":[95],"work":[96],"proposes":[97],"a":[98,125,133,154],"Binary":[100],"Translation":[101],"algorithm,":[102],"implemented":[103],"in":[104,108,153,161],"hardware":[105],"working":[107],"parallel":[109],"processor,":[112],"responsible":[113],"transforming":[115],"instructions":[118],"at":[119],"run-time":[120],"executed":[123],"dynamic":[126],"coarse-grain":[127],"reconfigurable":[128],"array,":[129],"tightly":[130],"coupled":[131],"traditional":[134,188],"RISC":[135],"machine.":[136],"Therefore,":[137],"we":[138,178],"take":[140],"advantage":[141],"using":[143],"pure":[144],"combinational":[145],"logic":[146],"optimize":[148],"even":[149],"control-flow":[150],"oriented":[151],"totally":[155],"transparent":[156],"process,":[157],"modification":[160],"source":[163],"or":[164],"binary":[165],"codes.":[166],"Using":[167],"Simplescalar":[169],"Toolset":[170],"together":[171],"with":[172],"embedded":[174],"benchmark":[175],"suite":[176],"MIBench,":[177],"show":[179],"performance":[180],"improvements":[181],"evaluation":[184],"when":[185],"comparing":[186],"against":[187],"superscalar":[189],"architectures.":[190]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}