{"id":"https://openalex.org/W2158138820","doi":"https://doi.org/10.1109/vlsisoc.2007.4402473","title":"Estimating design time for system circuits","display_name":"Estimating design time for system circuits","publication_year":2007,"publication_date":"2007-10-01","ids":{"openalex":"https://openalex.org/W2158138820","doi":"https://doi.org/10.1109/vlsisoc.2007.4402473","mag":"2158138820"},"language":"en","primary_location":{"id":"doi:10.1109/vlsisoc.2007.4402473","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047829739","display_name":"Cyrus Bazeghi","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cyrus Bazeghi","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110263094","display_name":"Francisco J. Mesa-Mart\u00ednez","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Francisco J. Mesa-Martinez","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032662897","display_name":"Brian Greskamp","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brian Greskamp","raw_affiliation_strings":["Department of Computer Science, University of Illinois, Urbana-Champaign, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055909708","display_name":"Josep Torrellas","orcid":"https://orcid.org/0000-0003-2595-5228"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Josep Torrellas","raw_affiliation_strings":["Department of Computer Science, University of Illinois, Urbana-Champaign, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065936105","display_name":"Jose Renau","orcid":"https://orcid.org/0000-0001-5128-0506"},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jose Renau","raw_affiliation_strings":["Department of Computer Engineering, University of California, Santa Cruz, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California, Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.28176685,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"60","last_page":"65"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.6797478199005127},{"id":"https://openalex.org/keywords/estimator","display_name":"Estimator","score":0.6308144330978394},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6288146376609802},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5835686326026917},{"id":"https://openalex.org/keywords/printed-circuit-board","display_name":"Printed circuit board","score":0.5419940948486328},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.432743102312088},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.4283800721168518},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.414998859167099},{"id":"https://openalex.org/keywords/industrial-engineering","display_name":"Industrial engineering","score":0.41392916440963745},{"id":"https://openalex.org/keywords/cost-estimate","display_name":"Cost estimate","score":0.41243401169776917},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.38394397497177124},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.3061612844467163},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25414979457855225},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.1575467586517334},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.14903685450553894},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09244120121002197}],"concepts":[{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.6797478199005127},{"id":"https://openalex.org/C185429906","wikidata":"https://www.wikidata.org/wiki/Q1130160","display_name":"Estimator","level":2,"score":0.6308144330978394},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6288146376609802},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5835686326026917},{"id":"https://openalex.org/C120793396","wikidata":"https://www.wikidata.org/wiki/Q173350","display_name":"Printed circuit board","level":2,"score":0.5419940948486328},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.432743102312088},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.4283800721168518},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.414998859167099},{"id":"https://openalex.org/C13736549","wikidata":"https://www.wikidata.org/wiki/Q4489420","display_name":"Industrial engineering","level":1,"score":0.41392916440963745},{"id":"https://openalex.org/C93983250","wikidata":"https://www.wikidata.org/wiki/Q795053","display_name":"Cost estimate","level":2,"score":0.41243401169776917},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.38394397497177124},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.3061612844467163},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25414979457855225},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.1575467586517334},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.14903685450553894},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09244120121002197},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/vlsisoc.2007.4402473","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402473","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.132.130","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.132.130","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://cs.ucsc.edu/~renau/docs/vlsisoc07.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1487200611","https://openalex.org/W1514170621","https://openalex.org/W1591671213","https://openalex.org/W1970296212","https://openalex.org/W1984518284","https://openalex.org/W2035579528","https://openalex.org/W2108951641","https://openalex.org/W2123586642","https://openalex.org/W2481328736","https://openalex.org/W6989925906"],"related_works":["https://openalex.org/W4387303494","https://openalex.org/W2076876796","https://openalex.org/W2359669063","https://openalex.org/W3163908127","https://openalex.org/W2391956704","https://openalex.org/W2393271092","https://openalex.org/W4384080919","https://openalex.org/W2546805501","https://openalex.org/W2352564925","https://openalex.org/W2374021335"],"abstract_inverted_index":{"System":[0],"design":[1,29,47,99,117,154,165,182],"complexity":[2],"is":[3,16,61,66],"growing":[4],"rapidly.":[5],"As":[6],"a":[7,54,59,89,126,141,152,162],"result,":[8],"current":[9,83],"development":[10],"costs":[11],"are":[12,35,102],"constantly":[13],"increasing.":[14],"It":[15],"becoming":[17],"increasingly":[18,39],"difficult":[19],"to":[20,28,91,115,128,150,160],"estimate":[21,94,180],"how":[22],"much":[23],"time":[24],"it":[25],"will":[26],"take":[27],"and":[30,38,73,93,109,118,140],"verify":[31],"these":[32],"designs,":[33],"which":[34],"getting":[36],"denser":[37],"more":[40],"complex.":[41],"To":[42,78],"compound":[43],"this":[44,85],"problem,":[45],"circuit":[46,97],"cost":[48],"estimation":[49],"still":[50],"does":[51],"not":[52],"have":[53],"quantitative":[55],"approach.":[56],"Although":[57],"designing":[58],"system":[60],"very":[62],"resource":[63],"consuming,":[64],"there":[65],"little":[67],"work":[68],"invested":[69],"in":[70,137,148],"measuring,":[71],"understanding,":[72],"estimating":[74],"the":[75,82,103,131,134,138,174],"effort":[76,155,166],"required.":[77],"address":[79],"part":[80],"of":[81,106,113,122,133,145,164],"shortcomings,":[84],"paper":[86],"introduces":[87],"\u03bcPCBComplexity,":[88],"methodology":[90],"measure":[92],"PCB":[95,170,181],"(printed":[96],"board)":[98],"effort.":[100,183],"PCBs":[101],"central":[104],"component":[105],"many":[107],"systems":[108],"require":[110],"large":[111],"amounts":[112],"resources":[114],"properly":[116],"verify.":[119],"\u03bcPCBComplexity":[120,159,176],"consists":[121],"two":[123],"main":[124],"parts;":[125],"procedure":[127],"account":[129],"for":[130,168],"contributions":[132],"different":[135],"elements":[136],"design,":[139],"non-linear":[142],"statistical":[143],"regression":[144],"experimental":[146],"measures":[147],"order":[149],"determine":[151],"good":[153],"metric.":[156],"We":[157],"use":[158],"evaluate":[161],"series":[163],"estimators":[167],"twelve":[169],"designs.":[171],"By":[172],"using":[173],"proposed":[175],"metric,":[177],"designers":[178],"can":[179]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
