{"id":"https://openalex.org/W2131055836","doi":"https://doi.org/10.1109/vlsisoc.2007.4402472","title":"A software-supported methodology for designing high-performance 3D FPGA architectures","display_name":"A software-supported methodology for designing high-performance 3D FPGA architectures","publication_year":2007,"publication_date":"2007-10-01","ids":{"openalex":"https://openalex.org/W2131055836","doi":"https://doi.org/10.1109/vlsisoc.2007.4402472","mag":"2131055836"},"language":"en","primary_location":{"id":"doi:10.1109/vlsisoc.2007.4402472","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402472","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://doi.org/10.1109/VLSISOC.2007.4402472","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072486756","display_name":"Kostas Siozios","orcid":"https://orcid.org/0000-0002-0285-2202"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kostas Siozios","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036700674","display_name":"K. Sotiriadis","orcid":null},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kostas Sotiriadis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108518426","display_name":"Vassilis F. Pavlidis","orcid":null},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vassilis F. Pavlidis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Rochester, USA","[Department of Electrical & Computer Engineering, University of Rochester, USA]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Rochester, USA","institution_ids":["https://openalex.org/I5388228"]},{"raw_affiliation_string":"[Department of Electrical & Computer Engineering, University of Rochester, USA]","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Dimitrios Soudris","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Democritus University of Thrace, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering , Democritus University of Thrace , 67100 Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.9911,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.94296608,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"54","last_page":"59"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8436987996101379},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7077770233154297},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6348847150802612},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6164141893386841},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5938512682914734},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.57712322473526},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.524360179901123},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5044630765914917},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.498063325881958},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.48489099740982056},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4378342926502228},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3810618817806244},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3282513916492462},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14741894602775574},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11537763476371765},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08269569277763367},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07177743315696716}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8436987996101379},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7077770233154297},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6348847150802612},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6164141893386841},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5938512682914734},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.57712322473526},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.524360179901123},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5044630765914917},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.498063325881958},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.48489099740982056},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4378342926502228},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3810618817806244},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3282513916492462},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14741894602775574},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11537763476371765},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08269569277763367},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07177743315696716},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/vlsisoc.2007.4402472","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsisoc.2007.4402472","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IFIP International Conference on Very Large Scale Integration","raw_type":"proceedings-article"},{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/35226","is_oa":true,"landing_page_url":"http://doi.org/10.1109/VLSISOC.2007.4402472","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Very Large Scale Integration","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/dee08bc2-11ca-4c25-b7c7-77cbf93efc8c","is_oa":false,"landing_page_url":"https://research.manchester.ac.uk/en/publications/dee08bc2-11ca-4c25-b7c7-77cbf93efc8c","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Siozios, K, Sotiriadis, K, Pavlidis, V & Soudris, D 2007, A software-supported methodology for designing high-performance 3D FPGA architectures. in 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC., 4402472, pp. 54-59, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC, Atlanta, GA, United States, 15/10/07. https://doi.org/10.1109/VLSISOC.2007.4402472","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:pure.atira.dk:publications/dee08bc2-11ca-4c25-b7c7-77cbf93efc8c","is_oa":false,"landing_page_url":"https://www.research.manchester.ac.uk/portal/en/publications/a-softwaresupported-methodology-for-designing-highperformance-3d-fpga-architectures(dee08bc2-11ca-4c25-b7c7-77cbf93efc8c).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400662","display_name":"Research Explorer (The University of Manchester)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I28407311","host_organization_name":"University of Manchester","host_organization_lineage":["https://openalex.org/I28407311"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Siozios, K, Sotiriadis, K, Pavlidis, V & Soudris, D 2007, A software-supported methodology for designing high-performance 3D FPGA architectures. in 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC., 4402472, pp. 54-59, 2007 IFIP International Conference on Very Large Scale Integration, VLSI-SoC, Atlanta, GA, United States, 15/10/07. https://doi.org/10.1109/VLSISOC.2007.4402472","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/35226","is_oa":true,"landing_page_url":"http://doi.org/10.1109/VLSISOC.2007.4402472","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Very Large Scale Integration","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W1719300925","https://openalex.org/W2009795871","https://openalex.org/W2113911387","https://openalex.org/W2116008950","https://openalex.org/W2132668926","https://openalex.org/W2140094024","https://openalex.org/W2146185334","https://openalex.org/W2170288260","https://openalex.org/W2184195670","https://openalex.org/W6637449779","https://openalex.org/W6686347991"],"related_works":["https://openalex.org/W2110265185","https://openalex.org/W3146360095","https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2126857316","https://openalex.org/W2184011203","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W2366961778","https://openalex.org/W1572721274"],"abstract_inverted_index":{"A":[0],"software-supported":[1],"systematic":[2],"methodology":[3,85],"for":[4,27,38,91,102],"exploring":[5],"and":[6,24,31,96,132,139,153],"evaluating":[7],"alternative":[8,103],"3D":[9,28,69,104,149,176],"reconfigurable":[10],"FPGA":[11,177],"architectures":[12,40,150],"is":[13],"introduced.":[14],"Two":[15],"new":[16,49],"software":[17],"tools":[18],"were":[19],"developed:":[20],"(i)":[21],"a":[22,33,175],"placement":[23],"routing":[25],"tool":[26,37],"FPGAs":[29,70],"(3DPRO)":[30],"(H)":[32],"power/energy":[34],"consumption":[35,95,135],"estimation":[36],"such":[39],"(3DPower).":[41],"Both":[42],"of":[43,47,67,75,82,99,112,136,155,171,174],"them":[44],"are":[45,165],"part":[46],"the":[48,63,68,80,83,110,116,127,129,133,169],"Design":[50],"Framework,":[51],"named":[52],"3D-MEANDER.":[53],"We":[54,78,121],"mainly":[55],"focus":[56],"our":[57,113],"exploration":[58,90],"on":[59],"parameters":[60],"that":[61,161],"dominate":[62],"maximum":[64],"operation":[65],"frequency":[66],"(i.e.":[71],"vertical":[72,100],"interconnections,":[73],"number":[74,98,170],"layers,":[76],"etc.).":[77],"evaluate":[79],"efficiency":[81],"proposed":[84],"by":[86],"making":[87],"an":[88,123],"exhaustive":[89],"device":[92],"delay,":[93,128],"power":[94],"utilized":[97],"connections":[101],"interconnection":[105],"schemes.":[106],"Experimental":[107],"results":[108],"demonstrate":[109],"effectiveness":[111],"methodology,":[114],"considering":[115,148],"20":[117],"largest":[118],"MCNC":[119],"benchmarks.":[120],"achieve":[122],"average":[124],"decrease":[125],"in":[126],"wire":[130],"length,":[131],"energy":[134],"27%,":[137],"26%,":[138],"34%,":[140],"respectively,":[141],"as":[142],"compared":[143],"to":[144],"traditional":[145],"2D":[146],"FPGAs,":[147],"with":[151],"50%":[152],"70%":[154],"fabricated":[156,172],"vias.":[157],"Also,":[158],"we":[159],"proved":[160],"actually-utilized":[162],"via":[163],"links":[164],"practically":[166],"independent":[167],"from":[168],"vias":[173],"architecture.":[178]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}
