{"id":"https://openalex.org/W4295791082","doi":"https://doi.org/10.1109/vlsid2022.2022.00050","title":"40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode","display_name":"40nm Ultra-low Leakage SRAM with Embedded Sub-threshold Analog Closed Loop System for Efficient Source Biasing of the Memory Array in Retention Mode","publication_year":2022,"publication_date":"2022-02-01","ids":{"openalex":"https://openalex.org/W4295791082","doi":"https://doi.org/10.1109/vlsid2022.2022.00050"},"language":"en","primary_location":{"id":"doi:10.1109/vlsid2022.2022.00050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsid2022.2022.00050","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020900413","display_name":"Kedar Janardan Dhori","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Kedar Janardan Dhori","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045708028","display_name":"Promod Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Promod Kumar","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035863694","display_name":"Christophe Lecocq","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Christophe Lecocq","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111440581","display_name":"Pascal Urard","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Pascal Urard","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079073365","display_name":"Olivier Callen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Olivier Callen","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063370961","display_name":"F. Cacho","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Florian Cacho","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112863278","display_name":"M. Parra","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Maryline Parra","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101689583","display_name":"Prashant Kumar Pandey","orcid":"https://orcid.org/0000-0003-2450-1304"},"institutions":[{"id":"https://openalex.org/I4210094169","display_name":"STMicroelectronics (India)","ror":"https://ror.org/00ft7bw25","country_code":"IN","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210094169"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Prashant Pandey","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Greater Noida,UP,India,201308","institution_ids":["https://openalex.org/I4210094169"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109339688","display_name":"D. Noblet","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Daniel Noblet","raw_affiliation_strings":["STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920"],"affiliations":[{"raw_affiliation_string":"STMicroelectronics,FEM and PR&#x0026;D Department,Crolles,France,38140/38920","institution_ids":["https://openalex.org/I4210104693"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5020900413"],"corresponding_institution_ids":["https://openalex.org/I4210094169"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07379816,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"216","last_page":"221"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7675338983535767},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.6116313934326172},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.5569877028465271},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44628071784973145},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.44053107500076294},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26490122079849243},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2641009986400604},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23267552256584167},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2060748040676117}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7675338983535767},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.6116313934326172},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.5569877028465271},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44628071784973145},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.44053107500076294},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26490122079849243},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2641009986400604},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23267552256584167},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2060748040676117},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsid2022.2022.00050","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsid2022.2022.00050","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.46000000834465027,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1527137186","https://openalex.org/W2109458212","https://openalex.org/W2124210802","https://openalex.org/W2157743350","https://openalex.org/W2168106261","https://openalex.org/W2800107826","https://openalex.org/W2904009639","https://openalex.org/W2942486122","https://openalex.org/W2949679068","https://openalex.org/W3048848924","https://openalex.org/W3089456341","https://openalex.org/W3091705402","https://openalex.org/W3194984264","https://openalex.org/W6676534250","https://openalex.org/W6678477870"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2069427488","https://openalex.org/W2212894501","https://openalex.org/W4281694563","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W2053448087"],"abstract_inverted_index":{"Scaling":[0],"of":[1,20,56,95,177],"the":[2,17,47,68,75,100,104,134,148,192],"MOSFET":[3],"feature":[4],"size,":[5],"with":[6,32,120,159,165],"an":[7],"advance":[8],"in":[9,16,171,181],"technology,":[10],"leads":[11],"to":[12,50,102,112,132,147,183],"a":[13,28,116,124],"significant":[14],"increase":[15],"static":[18],"power":[19],"mobile":[21],"or":[22,64,84],"IoT":[23],"device":[24],"system-on-chip":[25],"(SoC),":[26],"so":[27],"specialized":[29],"retention":[30,42],"mode,":[31],"voltage":[33],"lowering,":[34],"is":[35,79,92,110,145],"used.":[36],"Rail-to-":[37],"Rail":[38],"(Vret)":[39],"supply":[40],"during":[41],"mode":[43],"should":[44],"be":[45,152],"above":[46],"minimum":[48],"(Vret-min)":[49],"guarantee":[51],"bit-cell":[52],"(BC)":[53],"data":[54],"integrity":[55],"Static":[57],"Memory":[58],"(SRAM).":[59],"Lower":[60],"temperatures":[61],"like":[62],"\u221240\u00b0C":[63],"corner":[65],"lots":[66],"are":[67],"worst":[69,108],"conditions":[70],"for":[71,82,155],"Vret-min":[72],"[1],":[73],"and":[74,123,136,150,179,186,195],"worst-case":[76],"design":[77,188],"approach":[78],"not":[80],"efficient":[81],"nominal":[83],"fast":[85],"corners.":[86],"An":[87],"adaptive":[88],"regulation":[89],"scheme":[90],"[2]":[91],"one":[93],"way":[94],"approaching":[96],"this":[97],"issue,":[98],"but":[99],"monitor":[101],"track":[103],"statistically":[105],"(local":[106],"variation)":[107],"BC":[109,169],"difficult":[111],"design.":[113],"We":[114],"present":[115],"closed-loop":[117],"system":[118,144],"(CLS)":[119],"temperature":[121,135],"modulation":[122],"digital":[125],"signal":[126],"bus":[127],"(RM)":[128],"controlled":[129],"\u201creference":[130],"generator\u201d":[131],"adapt":[133],"process,":[137],"respectively,":[138],"without":[139],"relying":[140],"on":[141],"monitors.":[142],"The":[143],"built-in":[146],"memory":[149],"can":[151],"programmed":[153],"differently":[154],"corners":[156],"by":[157],"RM":[158],"information":[160],"from":[161],"process":[162],"centering.":[163],"Implementation":[164],"single-port":[166],"high-density":[167],"0.242um2":[168],"(HD242)":[170],"40nm":[172],"technology":[173],"shows":[174],"leakage":[175],"reduction":[176],"~77%":[178],"~62%":[180],"comparison":[182],"\u201cno":[184],"retention\u201d":[185],"\u201cworst-case":[187],"approach\u201d":[189],"respectively":[190],"at":[191],"typical":[193],"lot":[194],"25":[196],"\u00b0C":[197],"temperature.":[198]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
