{"id":"https://openalex.org/W2898735895","doi":"https://doi.org/10.1109/vlsic.2018.8502359","title":"A 50GB/S 1.6PJ/B RX Data-Path with Quarter-Rate 3-Tap Speculative DFE","display_name":"A 50GB/S 1.6PJ/B RX Data-Path with Quarter-Rate 3-Tap Speculative DFE","publication_year":2018,"publication_date":"2018-06-01","ids":{"openalex":"https://openalex.org/W2898735895","doi":"https://doi.org/10.1109/vlsic.2018.8502359","mag":"2898735895"},"language":"en","primary_location":{"id":"doi:10.1109/vlsic.2018.8502359","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2018.8502359","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Symposium on VLSI Circuits","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014994900","display_name":"Pier Andrea Francese","orcid":"https://orcid.org/0000-0003-2944-9058"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Pier Andrea Francese","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013635152","display_name":"Alessandro Cevrero","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Alessandro Cevrero","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052709518","display_name":"\u0130lter \u00d6zkaya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Ilter Ozkaya","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111996411","display_name":"Matthias Br\u00e4ndli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Matthias Brandli","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028644477","display_name":"Christian Menolfi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Christian Menolfi","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088828887","display_name":"Thomas Morf","orcid":"https://orcid.org/0000-0002-2712-6653"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Thomas Morf","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085908094","display_name":"Marcel Kossel","orcid":"https://orcid.org/0000-0003-3053-2422"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marcel Kossel","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055433194","display_name":"Lukas Kull","orcid":"https://orcid.org/0000-0001-9607-0430"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Lukas Kull","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008093986","display_name":"Danny Luu","orcid":"https://orcid.org/0000-0003-2817-0354"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Danny Luu","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084903090","display_name":"Thomas Toifl","orcid":"https://orcid.org/0000-0002-6448-1961"},"institutions":[{"id":"https://openalex.org/I4210126328","display_name":"IBM Research - Zurich","ror":"https://ror.org/02js37d36","country_code":"CH","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210126328"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Thomas Toifl","raw_affiliation_strings":["IBM Research-Zurich, Rueschlikon, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research-Zurich, Rueschlikon, Switzerland","institution_ids":["https://openalex.org/I4210126328"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":10,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7856,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.74737305,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"267","last_page":"268"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.6302778720855713},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.6117872595787048},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5637384653091431},{"id":"https://openalex.org/keywords/equalization","display_name":"Equalization (audio)","score":0.49592694640159607},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.49162012338638306},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.4771434962749481},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3248628079891205},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2746005654335022},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24289003014564514}],"concepts":[{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.6302778720855713},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.6117872595787048},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5637384653091431},{"id":"https://openalex.org/C75755367","wikidata":"https://www.wikidata.org/wiki/Q104531076","display_name":"Equalization (audio)","level":3,"score":0.49592694640159607},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.49162012338638306},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.4771434962749481},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3248628079891205},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2746005654335022},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24289003014564514},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsic.2018.8502359","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2018.8502359","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Symposium on VLSI Circuits","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1573979618","https://openalex.org/W2102461235","https://openalex.org/W2125540128","https://openalex.org/W2414259551"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W3125011624","https://openalex.org/W1508631387","https://openalex.org/W2370917603","https://openalex.org/W2017776670","https://openalex.org/W2952760143","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W2347897961","https://openalex.org/W4312327035"],"abstract_inverted_index":{"A":[0],"decision":[1],"feedback":[2,52],"equalization":[3],"(DFE)":[4],"technique":[5,16],"suitable":[6],"for":[7],"high":[8],"data-rate":[9],"I/O":[10],"link":[11],"receivers":[12],"is":[13,50,61,74],"presented.":[14],"The":[15,58],"leverages":[17],"quarter-rate":[18],"data":[19,78],"slicing":[20],"to":[21,32,40],"implement":[22],"a":[23,34,83],"fully":[24],"speculative":[25],"3-tap":[26],"DFE":[27,56],"and":[28],"uses":[29],"clock":[30],"forwarding":[31],"reach":[33],"speed":[35],"of":[36,44,53],"50Gb/s.":[37],"It":[38],"corresponds":[39],"20ps":[41],"timing":[42],"closure":[43],"the":[45,51,54,72],"most":[46],"critical":[47],"path,":[48],"which":[49],"first":[55],"tap.":[57],"RX":[59],"data-path":[60],"implemented":[62],"in":[63],"14nm":[64],"FinFET":[65],"CMOS":[66],"SOI":[67],"technology.":[68],"At":[69],"0.9V":[70],"supply":[71],"energy-efficiency":[73],"1.6pJ/b":[75],"when":[76],"PRBS15":[77],"transmitted":[79],"at":[80],"50Gb/s":[81],"across":[82],"channel":[84],"with":[85,91],"32.5dB":[86],"insertion":[87],"loss":[88],"are":[89],"recovered":[90],">30%":[92],"horizontal":[93],"margin":[94],"(BER<;10-":[95],"<sup":[96],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[97],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">12</sup>":[98],").":[99]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}