{"id":"https://openalex.org/W2023227894","doi":"https://doi.org/10.1109/vlsic.2012.6243809","title":"A 47% access time reduction with a worst-case timing-generation scheme utilizing a statistical method for ultra low voltage SRAMs","display_name":"A 47% access time reduction with a worst-case timing-generation scheme utilizing a statistical method for ultra low voltage SRAMs","publication_year":2012,"publication_date":"2012-06-01","ids":{"openalex":"https://openalex.org/W2023227894","doi":"https://doi.org/10.1109/vlsic.2012.6243809","mag":"2023227894"},"language":"en","primary_location":{"id":"doi:10.1109/vlsic.2012.6243809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2012.6243809","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Symposium on VLSI Circuits (VLSIC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080211932","display_name":"Atsushi Kawasumi","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Atsushi Kawasumi","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032269766","display_name":"Y. Takeyama","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yasuhisa Takeyama","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013755323","display_name":"Osamu Hirabayashi","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Osamu Hirabayashi","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044735538","display_name":"K. Kushida","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Keiichi Kushida","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021907697","display_name":"Fumihiko Tachibana","orcid":"https://orcid.org/0000-0002-6311-9215"},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Fumihiko Tachibana","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055824203","display_name":"Yusuke Niki","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yusuke Niki","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103828588","display_name":"Sasaki Shinichi","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shinichi Sasaki","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054331498","display_name":"Tomoaki Yabe","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tomoaki Yabe","raw_affiliation_strings":["Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Semiconductor Research and Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]},{"raw_affiliation_string":"Center for Semiconductor Research & Development, Toshiba, Kawasaki, Japan","institution_ids":["https://openalex.org/I1292669757"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1292669757"],"apc_list":null,"apc_paid":null,"fwci":2.4739,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.88866838,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"100","last_page":"101"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.7450606822967529},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6616718769073486},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6035720109939575},{"id":"https://openalex.org/keywords/access-time","display_name":"Access time","score":0.5473577380180359},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.5259535312652588},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5138221383094788},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.4902265667915344},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.47428399324417114},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4691941440105438},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.42053383588790894},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3348211646080017},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24145832657814026},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.2142680287361145},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21023458242416382},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19717469811439514},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11707556247711182}],"concepts":[{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.7450606822967529},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6616718769073486},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6035720109939575},{"id":"https://openalex.org/C194080101","wikidata":"https://www.wikidata.org/wiki/Q46306","display_name":"Access time","level":2,"score":0.5473577380180359},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.5259535312652588},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5138221383094788},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.4902265667915344},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.47428399324417114},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4691941440105438},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.42053383588790894},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3348211646080017},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24145832657814026},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.2142680287361145},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21023458242416382},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19717469811439514},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11707556247711182},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsic.2012.6243809","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2012.6243809","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Symposium on VLSI Circuits (VLSIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1835913819","https://openalex.org/W2548084981","https://openalex.org/W2051363901","https://openalex.org/W2127348582","https://openalex.org/W2136142653","https://openalex.org/W2373152541","https://openalex.org/W2107909712","https://openalex.org/W2389637992","https://openalex.org/W3200702775","https://openalex.org/W2351439697"],"abstract_inverted_index":{"A":[0],"variation":[1],"tolerant":[2],"sense":[3],"amplifier":[4],"timing":[5,25,32],"generator":[6],"which":[7],"utilizes":[8],"a":[9],"statistical":[10],"method":[11],"is":[12],"proposed.":[13],"The":[14,30,42],"circuit":[15],"monitors":[16],"all":[17],"the":[18,23,27],"bitline":[19],"delays":[20],"and":[21,39],"generates":[22],"worst":[24],"from":[26],"delay":[28],"distribution.":[29],"proposed":[31],"generators":[33],"have":[34],"been":[35,48],"implemented":[36],"in":[37,50],"28nm":[38],"40nm":[40],"SRAMs.":[41],"47%":[43],"access":[44],"time":[45],"reduction":[46],"has":[47],"confirmed":[49],"measured":[51],"results.":[52]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}