{"id":"https://openalex.org/W1970536705","doi":"https://doi.org/10.1109/vlsic.2012.6243797","title":"A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS","display_name":"A 2.4GHz WLAN transceiver with fully-integrated highly-linear 1.8V 28.4dBm PA, 34dBm T/R switch, 240MS/s DAC, 320MS/s ADC, and DPLL in 32nm SoC CMOS","publication_year":2012,"publication_date":"2012-06-01","ids":{"openalex":"https://openalex.org/W1970536705","doi":"https://doi.org/10.1109/vlsic.2012.6243797","mag":"1970536705"},"language":"en","primary_location":{"id":"doi:10.1109/vlsic.2012.6243797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2012.6243797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Symposium on VLSI Circuits (VLSIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029428486","display_name":"Yulin Tan","orcid":"https://orcid.org/0000-0002-9223-5258"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Y. Tan","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070524748","display_name":"J.S. Duster","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Duster","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025821674","display_name":"C-T. Fu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C-T. Fu","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060170109","display_name":"Erkan Alpman","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Alpman","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023837519","display_name":"Ajay Balankutty","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Balankutty","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078984669","display_name":"C. Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Lee","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058466731","display_name":"Ashoke Ravi","orcid":"https://orcid.org/0000-0001-8302-622X"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Ravi","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065695022","display_name":"Stefano Pellerano","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Pellerano","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039602588","display_name":"Kailash Chandrashekar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Chandrashekar","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051066139","display_name":"H. Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Kim","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059381050","display_name":"Brent Carlton","orcid":"https://orcid.org/0000-0003-4542-4715"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Carlton","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002015090","display_name":"Satoshi Suzuki","orcid":"https://orcid.org/0000-0002-7287-6998"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Suzuki","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047954881","display_name":"Mansoor Shafi","orcid":"https://orcid.org/0000-0002-5492-8969"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Shafi","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079858274","display_name":"Yorgos Palaskas","orcid":"https://orcid.org/0000-0003-0551-7327"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Y. Palaskas","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002626327","display_name":"Hasnain Lakdawala","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Lakdawala","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR, USA","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":15,"corresponding_author_ids":["https://openalex.org/A5029428486"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":1.473,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.82806813,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"76","last_page":"77"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9864000082015991,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7103783488273621},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.6766712069511414},{"id":"https://openalex.org/keywords/linearization","display_name":"Linearization","score":0.6199126839637756},{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.5128686428070068},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.40814292430877686},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3493421673774719},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3424740433692932},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3222312033176422},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.3211245834827423},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.244094580411911},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.24124577641487122},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1730158030986786}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7103783488273621},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.6766712069511414},{"id":"https://openalex.org/C11210021","wikidata":"https://www.wikidata.org/wiki/Q1520713","display_name":"Linearization","level":3,"score":0.6199126839637756},{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.5128686428070068},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.40814292430877686},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3493421673774719},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3424740433692932},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3222312033176422},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.3211245834827423},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.244094580411911},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.24124577641487122},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1730158030986786},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsic.2012.6243797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsic.2012.6243797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Symposium on VLSI Circuits (VLSIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7400000095367432,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1969134354","https://openalex.org/W2015397896","https://openalex.org/W2021988103","https://openalex.org/W2101840429","https://openalex.org/W2151340196","https://openalex.org/W2152685717","https://openalex.org/W2168894102","https://openalex.org/W6655857118","https://openalex.org/W6684517013"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W4362575217","https://openalex.org/W2187634947","https://openalex.org/W2188204860","https://openalex.org/W2370449963","https://openalex.org/W2022846948","https://openalex.org/W2062735037","https://openalex.org/W1535839566","https://openalex.org/W2115569193","https://openalex.org/W2161127017"],"abstract_inverted_index":{"A":[0],"2.4GHz":[1],"WLAN":[2],"transceiver":[3],"is":[4],"presented":[5],"with":[6],"a":[7],"fully-integrated":[8],"highly-linear":[9],"28.4dBm":[10],"PA,":[11],"34dBm":[12],"T/R":[13],"switch,":[14],"240MS/s":[15],"DAC":[16],"and":[17,26,50,61],"320MS/s":[18],"ADC":[19],"(high":[20],"OSR":[21],"for":[22,47],"relaxed":[23],"filtering),":[24],"DPLL":[25],"fractional":[27],"LOG,":[28],"in":[29],"32nm":[30],"CMOS.":[31],"For":[32],"802.11g":[33],"54Mbps,":[34],"without":[35],"linearization":[36],"the":[37,54],"TX":[38],"delivers":[39],"19.8dBm":[40],"at":[41],"12.5%":[42],"efficiency":[43],"(PA":[44],"21.6dBm/19.7%":[45],"PAE)":[46],"-25dB":[48],"EVM":[49],"mask-compliant":[51],"22.8dBm/18.5%,":[52],"while":[53],"RX":[55],"achieves":[56],"4.8dB":[57],"NF,":[58],"-69dBm":[59],"sensitivity,":[60],"-8dBm":[62],"IIP3.":[63]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":5},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}