{"id":"https://openalex.org/W7135036507","doi":"https://doi.org/10.1109/vlsi-soc64688.2025.11421760","title":"Delay Mismatch Optimization in Routing Dominated Multi-Path Systems: A Case Study on an IR-UWB Edge-Combiner Transmitter Front End","display_name":"Delay Mismatch Optimization in Routing Dominated Multi-Path Systems: A Case Study on an IR-UWB Edge-Combiner Transmitter Front End","publication_year":2025,"publication_date":"2025-10-12","ids":{"openalex":"https://openalex.org/W7135036507","doi":"https://doi.org/10.1109/vlsi-soc64688.2025.11421760"},"language":null,"primary_location":{"id":"doi:10.1109/vlsi-soc64688.2025.11421760","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc64688.2025.11421760","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5128840666","display_name":"Kyla Marie H. Juruena","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"Kyla Marie H. Juruena","raw_affiliation_strings":["Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101","institution_ids":["https://openalex.org/I87074743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128891682","display_name":"Maria Ena R. Rosales","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"Maria Ena R. Rosales","raw_affiliation_strings":["Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101","institution_ids":["https://openalex.org/I87074743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128895002","display_name":"Trisha Renee G. Capulong","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"Trisha Renee G. Capulong","raw_affiliation_strings":["Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101","institution_ids":["https://openalex.org/I87074743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064490279","display_name":"Louis P. Alarc\u00f3n","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"Louis P. Alarc\u00f3n","raw_affiliation_strings":["Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute University of the Philippines Diliman,Microelectronics and Microprocessors Laboratory Electrical and Electronics Engineering,Quezon City,Philippines,1101","institution_ids":["https://openalex.org/I87074743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I87074743"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.75929434,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11409","display_name":"Advanced Wireless Network Optimization","score":0.12790000438690186,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11409","display_name":"Advanced Wireless Network Optimization","score":0.12790000438690186,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12024","display_name":"Ultra-Wideband Communications Technology","score":0.08969999849796295,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11873","display_name":"PAPR reduction in OFDM","score":0.07429999858140945,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/front-and-back-ends","display_name":"Front and back ends","score":0.5422999858856201},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.439300000667572},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.3691999912261963},{"id":"https://openalex.org/keywords/front","display_name":"Front (military)","score":0.30309998989105225},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.2879999876022339},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.27790001034736633}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5587000250816345},{"id":"https://openalex.org/C53016008","wikidata":"https://www.wikidata.org/wiki/Q620167","display_name":"Front and back ends","level":2,"score":0.5422999858856201},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.439300000667572},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3725999891757965},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.3691999912261963},{"id":"https://openalex.org/C2777551076","wikidata":"https://www.wikidata.org/wiki/Q842332","display_name":"Front (military)","level":2,"score":0.30309998989105225},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3025999963283539},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2888999879360199},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2879999876022339},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.27790001034736633},{"id":"https://openalex.org/C557945733","wikidata":"https://www.wikidata.org/wiki/Q389772","display_name":"Data transmission","level":2,"score":0.2766000032424927},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2597000002861023},{"id":"https://openalex.org/C2779664074","wikidata":"https://www.wikidata.org/wiki/Q3518405","display_name":"Terminal (telecommunication)","level":2,"score":0.2540000081062317},{"id":"https://openalex.org/C74296488","wikidata":"https://www.wikidata.org/wiki/Q2527392","display_name":"End-to-end principle","level":2,"score":0.2531000077724457}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc64688.2025.11421760","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc64688.2025.11421760","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2056343074","https://openalex.org/W2151933980","https://openalex.org/W2503562753","https://openalex.org/W2808261674","https://openalex.org/W3023596058","https://openalex.org/W4362714748"],"related_works":[],"abstract_inverted_index":{"Routing-dominated":[0],"multi-path":[1],"architectures":[2],"play":[3],"a":[4],"critical":[5,27],"role":[6],"in":[7,14,48,115],"enhancing":[8],"data":[9,33],"throughput":[10],"and":[11,17,32,40,67,81],"resource":[12],"efficiency":[13],"computing,":[15],"communication,":[16],"RF":[18],"systems.":[19],"Hence,":[20],"ensuring":[21],"matched":[22],"point-to-point":[23],"signal":[24],"arrival":[25],"is":[26,51,63],"to":[28,65,93,123],"minimizing":[29],"distortion,":[30],"latency,":[31],"corruption":[34],"while":[35,53],"managing":[36],"increased":[37],"routing":[38,88],"density":[39],"interconnect":[41],"complexity.":[42],"In":[43],"this":[44,85],"paper,":[45],"delay":[46,70,125,134],"mismatch":[47,56,71],"routing-dominated":[49],"systems":[50],"investigated":[52],"assuming":[54],"negligible":[55],"within":[57],"circuit":[58],"blocks.":[59],"A":[60],"variancebased":[61],"framework":[62],"proposed":[64],"quantify":[66],"optimize":[68],"the":[69,78,116,129],"components":[72],"across":[73],"multiple":[74],"levels":[75],"of":[76,132],"abstraction:":[77],"system,":[79],"block,":[80],"layout.":[82],"To":[83],"validate":[84],"model,":[86],"systematic":[87],"optimization":[89],"techniques":[90],"are":[91],"applied":[92],"an":[94],"impulse-radio":[95],"ultra-wideband":[96],"(IR-UWB)":[97],"edge-combiner":[98],"transmitter":[99],"front":[100],"end":[101],"(TFE)":[102],"operating":[103],"at":[104],"$6.5-8.0":[105],"\\mathrm{GHz}$":[106],"center":[107],"frequency.":[108],"The":[109],"TFE":[110],"requires":[111],"precise":[112],"pulse":[113],"widths":[114],"picosecond":[117],"range,":[118],"making":[119],"it":[120],"highly":[121],"susceptible":[122],"interconnect-induced":[124],"variability.":[126],"After":[127],"optimization,":[128],"total":[130],"variance":[131],"propagation":[133],"was":[135],"decreased":[136],"by":[137],"94.37%":[138],"based":[139],"on":[140],"post-layout":[141],"simulations.":[142]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-03-13T00:00:00"}