{"id":"https://openalex.org/W7135075432","doi":"https://doi.org/10.1109/vlsi-soc64688.2025.11421717","title":"A Case Study on the Migration of a High-Level PI Controller to ASIC-Compatible HDL Representation","display_name":"A Case Study on the Migration of a High-Level PI Controller to ASIC-Compatible HDL Representation","publication_year":2025,"publication_date":"2025-10-12","ids":{"openalex":"https://openalex.org/W7135075432","doi":"https://doi.org/10.1109/vlsi-soc64688.2025.11421717"},"language":null,"primary_location":{"id":"doi:10.1109/vlsi-soc64688.2025.11421717","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc64688.2025.11421717","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5128822150","display_name":"Francisca Donoso","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Francisca Donoso","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128827442","display_name":"Nelson Salvador","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nelson Salvador","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5128856927","display_name":"Jorge Marin","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jorge Marin","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031184220","display_name":"Christian A. Rojas","orcid":"https://orcid.org/0000-0002-2071-1665"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Christian A. Rojas","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5035484485","display_name":"Gonzalo Carvajal","orcid":"https://orcid.org/0000-0003-1116-6180"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Gonzalo Carvajal","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.65530386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.15209999680519104,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.15209999680519104,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13924","display_name":"Internet of Things and Social Network Interactions","score":0.0502999983727932,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.02669999934732914,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5961999893188477},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.5598000288009644},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.4684999883174896},{"id":"https://openalex.org/keywords/control-system","display_name":"Control system","score":0.29679998755455017},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.2800999879837036}],"concepts":[{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5961999893188477},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.5598000288009644},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5228999853134155},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.4684999883174896},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3416000008583069},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31619998812675476},{"id":"https://openalex.org/C17500928","wikidata":"https://www.wikidata.org/wiki/Q959968","display_name":"Control system","level":2,"score":0.29679998755455017},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.28839999437332153},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.2800999879837036},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.27149999141693115}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc64688.2025.11421717","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc64688.2025.11421717","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IFIP/IEEE 33rd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/10","score":0.7280277609825134,"display_name":"Reduced inequalities"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2060943953","https://openalex.org/W4285211176","https://openalex.org/W4404689285"],"related_works":[],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,26,34,116],"structured":[4],"methodology":[5,44],"for":[6,19,25,59,67,121],"migrating":[7],"digital":[8],"control":[9,124],"algorithms":[10],"developed":[11],"in":[12],"high-level":[13,65,80,123],"languages":[14],"into":[15],"synthesizable":[16],"HDL":[17,68,87],"suitable":[18],"ASIC":[20],"implementation.":[21],"A":[22],"proportional-integral":[23],"controller":[24],"three-level":[27],"flying":[28],"capacitor":[29],"converter":[30],"is":[31],"used":[32],"as":[33],"representative":[35],"case":[36],"study":[37],"to":[38,52,62,74,126],"demonstrate":[39],"the":[40,79,83,92,97,110,131],"design":[41],"flow.":[42],"The":[43,86,112],"encompasses":[45],"initial":[46],"modeling":[47],"using":[48,91],"floating-point":[49],"arithmetic,":[50],"conversion":[51],"fixed-point":[53],"representation,":[54],"generation":[55],"of":[56,109],"reference":[57],"models":[58],"validation,":[60],"translation":[61],"C/C++,":[63],"and":[64,82,106,118],"synthesis":[66],"generation.":[69],"Preliminary":[70],"results":[71],"consider":[72],"co-simulation":[73],"ensure":[75],"behavioral":[76],"consistency":[77],"between":[78],"description":[81],"generated":[84],"HDL.":[85],"was":[88],"successfully":[89],"synthesized":[90],"open-source":[93],"LibreLane":[94],"tool-chain":[95],"targeting":[96],"SkyWater":[98],"SKY130":[99],"PDK.":[100],"Ongoing":[101],"work":[102],"includes":[103],"FPGA-based":[104],"prototyping":[105],"detailed":[107],"characterization":[108],"ASIC.":[111],"proposed":[113],"approach":[114],"establishes":[115],"verified":[117],"systematic":[119],"pathway":[120],"transitioning":[122],"logic":[125],"ASIC-ready":[127],"hardware":[128],"implementations,":[129],"preserving":[130],"original":[132],"algorithmic":[133],"behavior":[134],"across":[135],"abstraction":[136],"levels.":[137]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-03-13T00:00:00"}