{"id":"https://openalex.org/W4404954106","doi":"https://doi.org/10.1109/vlsi-soc62099.2024.10767807","title":"Understanding Transistor Aging Impact on the Behavior of RRAM Cells","display_name":"Understanding Transistor Aging Impact on the Behavior of RRAM Cells","publication_year":2024,"publication_date":"2024-10-06","ids":{"openalex":"https://openalex.org/W4404954106","doi":"https://doi.org/10.1109/vlsi-soc62099.2024.10767807"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc62099.2024.10767807","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc62099.2024.10767807","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067084820","display_name":"Seyed Hossein Hashemi Shadmehri","orcid":null},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Seyed Hossein Hashemi Shadmehri","raw_affiliation_strings":["RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"],"affiliations":[{"raw_affiliation_string":"RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007153964","display_name":"Supriya Chakraborty","orcid":"https://orcid.org/0000-0001-8890-5223"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Supriya Chakraborty","raw_affiliation_strings":["RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"],"affiliations":[{"raw_affiliation_string":"RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082898315","display_name":"T. Copetti","orcid":"https://orcid.org/0000-0001-7591-6484"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thiago Santos Copetti","raw_affiliation_strings":["RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"],"affiliations":[{"raw_affiliation_string":"RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056273734","display_name":"Fabian Vargas","orcid":"https://orcid.org/0000-0002-3871-6464"},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Fabian Luis Vargas","raw_affiliation_strings":["IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder),Germany"],"affiliations":[{"raw_affiliation_string":"IHP - Leibniz Institute for High Performance Microelectronics, Frankfurt (Oder),Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050123960","display_name":"L. M. Bolzani Poehls","orcid":"https://orcid.org/0000-0002-6043-1713"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Let\u00edcia Maria Bolzani Poehls","raw_affiliation_strings":["RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"],"affiliations":[{"raw_affiliation_string":"RWTH Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany","institution_ids":["https://openalex.org/I887968799"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5067084820"],"corresponding_institution_ids":["https://openalex.org/I887968799"],"apc_list":null,"apc_paid":null,"fwci":0.222,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55740209,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.7645589113235474},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6294761300086975},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5864580869674683},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4818190634250641},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.41971462965011597},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3388496935367584},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3346310555934906},{"id":"https://openalex.org/keywords/engineering-physics","display_name":"Engineering physics","score":0.333434134721756},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.32780659198760986},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1670900285243988},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09015622735023499}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.7645589113235474},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6294761300086975},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5864580869674683},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4818190634250641},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.41971462965011597},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3388496935367584},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3346310555934906},{"id":"https://openalex.org/C61696701","wikidata":"https://www.wikidata.org/wiki/Q770766","display_name":"Engineering physics","level":1,"score":0.333434134721756},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.32780659198760986},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1670900285243988},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09015622735023499}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc62099.2024.10767807","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc62099.2024.10767807","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2822299883","display_name":null,"funder_award_id":"16ES1134,16ES1133K","funder_id":"https://openalex.org/F4320321114","funder_display_name":"Bundesministerium f\u00fcr Bildung und Forschung"}],"funders":[{"id":"https://openalex.org/F4320321114","display_name":"Bundesministerium f\u00fcr Bildung und Forschung","ror":"https://ror.org/04pz7b180"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W2018068167","https://openalex.org/W2083980649","https://openalex.org/W2088481695","https://openalex.org/W2139286506","https://openalex.org/W2473024693","https://openalex.org/W2790716299","https://openalex.org/W2801846189","https://openalex.org/W2905684349","https://openalex.org/W2972825382","https://openalex.org/W3018877817","https://openalex.org/W3018945530","https://openalex.org/W3033091630","https://openalex.org/W3094004235","https://openalex.org/W3094245622","https://openalex.org/W3217233231","https://openalex.org/W4250599615","https://openalex.org/W4281559826","https://openalex.org/W4312865463","https://openalex.org/W4312912484","https://openalex.org/W4322576478","https://openalex.org/W4392367648"],"related_works":["https://openalex.org/W2076211355","https://openalex.org/W2007070351","https://openalex.org/W2033811947","https://openalex.org/W2183989414","https://openalex.org/W1551399929","https://openalex.org/W2038212394","https://openalex.org/W2620406532","https://openalex.org/W2410132916","https://openalex.org/W2104937488","https://openalex.org/W2725431849"],"abstract_inverted_index":{"Resistive":[0],"Random":[1],"Access":[2],"Memories":[3],"(RRAMs)":[4],"have":[5],"been":[6],"considered":[7],"for":[8,120],"implementing":[9,121],"various":[10],"emerging":[11],"applications":[12],"alongside":[13],"storage.":[14],"RRAMs":[15],"offer":[16],"the":[17,21,26,34,55,61,79,92,111,116,122],"opportunity":[18],"to":[19,43,102],"address":[20],"Von":[22],"Neumann":[23],"bottleneck":[24],"making":[25],"implementation":[27],"of":[28,36,57,63,71],"In-Memory":[29],"Computing":[30],"(IMC)":[31],"possible.":[32],"However,":[33],"exploration":[35],"RRAM":[37,65,73,124],"potentials":[38],"depends":[39],"on":[40,60],"being":[41],"able":[42],"guarantee":[44],"their":[45],"reliability":[46],"during":[47],"lifetime.":[48],"In":[49,109],"this":[50,52],"context,":[51],"paper":[53],"investigates":[54],"impact":[56],"transistor":[58,93,117],"aging":[59,138],"behavior":[62],"1T1R":[64,123],"cells.":[66],"A":[67],"case":[68],"study":[69],"composed":[70],"an":[72],"block,":[74],"including":[75],"peripherals,":[76],"implemented":[77],"using":[78],"22":[80],"nm":[81],"FDSOI":[82],"GF":[83],"technology":[84],"is":[85],"adopted.":[86],"The":[87],"obtained":[88,112],"results":[89,113],"indicate":[90],"that":[91,115],"aging,":[94],"which":[95],"was":[96],"previously":[97],"widely":[98],"ignored,":[99],"can":[100],"lead":[101],"parametric":[103],"degradation":[104],"or":[105,127],"even":[106],"catastrophic":[107],"faults.":[108],"addition,":[110],"show":[114],"type":[118],"used":[119],"cell,":[125],"core":[126],"IO":[128],"device,":[129],"and":[130],"operating":[131],"temperature":[132],"play":[133],"important":[134],"roles":[135],"when":[136],"analysing":[137],"impact.":[139]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-12-27T23:08:20.325037","created_date":"2025-10-10T00:00:00"}