{"id":"https://openalex.org/W4388893875","doi":"https://doi.org/10.1109/vlsi-soc57769.2023.10321881","title":"Analyzing the Impact of Different Real Number Formats on the Structural Reliability of TCUs in GPUs","display_name":"Analyzing the Impact of Different Real Number Formats on the Structural Reliability of TCUs in GPUs","publication_year":2023,"publication_date":"2023-10-16","ids":{"openalex":"https://openalex.org/W4388893875","doi":"https://doi.org/10.1109/vlsi-soc57769.2023.10321881"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc57769.2023.10321881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc57769.2023.10321881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006252702","display_name":"Robert Limas Sierra","orcid":"https://orcid.org/0000-0001-5206-3757"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Robert Limas Sierra","raw_affiliation_strings":["Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","Department of Control and Computer Engineering (DAUIN), Politecnico di Torino"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Control and Computer Engineering (DAUIN), Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046650816","display_name":"Juan-David Guerrero-Balaguera","orcid":"https://orcid.org/0000-0001-6852-2372"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Juan-David Guerrero-Balaguera","raw_affiliation_strings":["Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","Department of Control and Computer Engineering (DAUIN), Politecnico di Torino"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Control and Computer Engineering (DAUIN), Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107558399","display_name":"Josie E. Rodriguez Condia","orcid":"https://orcid.org/0000-0001-5957-5624"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Josie E. Rodriguez Condia","raw_affiliation_strings":["Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","Department of Control and Computer Engineering (DAUIN), Politecnico di Torino"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Control and Computer Engineering (DAUIN), Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058555274","display_name":"M. Sonza Reorda","orcid":"https://orcid.org/0000-0003-2899-7669"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Matteo Sonza Reorda","raw_affiliation_strings":["Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","Department of Control and Computer Engineering (DAUIN), Politecnico di Torino"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino,Department of Control and Computer Engineering (DAUIN)","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Control and Computer Engineering (DAUIN), Politecnico di Torino","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":2.0879,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.92399445,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7554671764373779},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.6429346799850464},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.6011731028556824},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4771922826766968},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4588722288608551},{"id":"https://openalex.org/keywords/graphics-processing-unit","display_name":"Graphics processing unit","score":0.43080273270606995},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4215543866157532},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4196094274520874},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4177525043487549},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.29613199830055237},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.23306837677955627},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18193292617797852},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1696857511997223}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7554671764373779},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.6429346799850464},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.6011731028556824},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4771922826766968},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4588722288608551},{"id":"https://openalex.org/C2779851693","wikidata":"https://www.wikidata.org/wiki/Q183484","display_name":"Graphics processing unit","level":2,"score":0.43080273270606995},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4215543866157532},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4196094274520874},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4177525043487549},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.29613199830055237},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.23306837677955627},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18193292617797852},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1696857511997223},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc57769.2023.10321881","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc57769.2023.10321881","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W2207050309","https://openalex.org/W2743322459","https://openalex.org/W2888024215","https://openalex.org/W2953212265","https://openalex.org/W2963989532","https://openalex.org/W2981834872","https://openalex.org/W3009452684","https://openalex.org/W3166958299","https://openalex.org/W3187084887","https://openalex.org/W3212496770","https://openalex.org/W4213195788","https://openalex.org/W4224981283","https://openalex.org/W4280619532","https://openalex.org/W4282982540","https://openalex.org/W4292873639","https://openalex.org/W4293149165","https://openalex.org/W4308477919","https://openalex.org/W4320527381","https://openalex.org/W6754096456"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2355315220","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2373535795","https://openalex.org/W3028347934","https://openalex.org/W2185692674","https://openalex.org/W2220968517"],"abstract_inverted_index":{"1Modern":[0],"Graphics":[1],"Processing":[2],"Units":[3,19],"(GPUs)":[4],"boost":[5],"the":[6,53,63,78,83,106,145,150,154,159,177,189],"execution":[7],"of":[8,41,65,85,115,136,205],"tiled":[9],"matrix":[10],"multiplications":[11],"by":[12,195,200],"extensively":[13],"using":[14,93],"in-chip":[15],"accelerators":[16],"(Tensor":[17],"Core":[18],"or":[20],"TCUs).":[21],"Unfortunately,":[22],"cutting-edge":[23],"semiconductor":[24],"technologies":[25],"are":[26,192],"increasingly":[27],"prone":[28],"to":[29,111,173,202],"fault":[30,123],"defects.":[31],"Indeed,":[32],"faults":[33,87,128,165,196],"may":[34],"affect":[35,171],"TCUs":[36,67,167],"when":[37,50,92],"processing":[38],"massive":[39],"amounts":[40],"data":[42],"under":[43],"classical":[44],"floating-point":[45],"formats,":[46],"raising":[47],"reliability":[48],"concerns":[49],"used":[51],"in":[52,89,149,166,168,176],"safety-critical":[54],"and":[55,103,120,131,153],"High-Performance":[56],"Computing":[57],"(HPC)":[58],"domains.":[59],"In":[60],"this":[61],"scenario,":[62],"characterization":[64],"faulty":[66],"supporting":[68],"different":[69,95],"arithmetic":[70],"formats":[71,96,191,199],"is":[72],"still":[73],"missed.":[74],"This":[75],"work":[76],"for":[77,97,180],"first":[79],"time":[80],"quantitatively":[81],"evaluates":[82],"effects":[84],"hardware":[86,164],"arising":[88],"TCU":[90,117],"structures":[91],"two":[94],"real":[98],"number":[99],"representation":[100],"(i.e.,":[101],"Floating-Point":[102,198],"Posit).":[104],"For":[105],"experimental":[107,139],"evaluation,":[108],"we":[109],"resort":[110],"an":[112],"architectural":[113],"description":[114],"a":[116,142],"core":[118],"(PyOpenTCU)":[119],"perform":[121],"60":[122],"simulation":[124],"campaigns,":[125],"injecting":[126],"57,344":[127],"per":[129],"campaign":[130],"requiring":[132],"around":[133],"24":[134],"days":[135],"computation.":[137],"The":[138,184],"results":[140,179,185],"indicate":[141],"relation":[143],"between":[144],"corrupted":[146],"spatial":[147],"areas":[148],"output":[151,178],"matrices":[152],"TCU\u2019s":[155],"scheduling":[156],"policies.":[157],"Moreover,":[158],"numeric":[160],"analysis":[161],"shows":[162],"that":[163,188],"most":[169],"cases":[170],"up":[172,201],"2":[174],"bits":[175],"both":[181],"considered":[182],"formats.":[183],"also":[186],"demonstrate":[187],"Posit":[190],"less":[193],"affected":[194],"than":[197],"one":[203],"order":[204],"magnitude.":[206]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":7}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
