{"id":"https://openalex.org/W4308575505","doi":"https://doi.org/10.1109/vlsi-soc54400.2022.9939597","title":"Speculative guardband: exploiting critical-delay variations across cached instructions","display_name":"Speculative guardband: exploiting critical-delay variations across cached instructions","publication_year":2022,"publication_date":"2022-10-03","ids":{"openalex":"https://openalex.org/W4308575505","doi":"https://doi.org/10.1109/vlsi-soc54400.2022.9939597"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc54400.2022.9939597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc54400.2022.9939597","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090681629","display_name":"Johannes W. Farias","orcid":null},"institutions":[{"id":"https://openalex.org/I35046152","display_name":"Universidade Federal do Rio Grande do Norte","ror":"https://ror.org/04wn09761","country_code":"BR","type":"education","lineage":["https://openalex.org/I35046152"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Johannes W. Farias","raw_affiliation_strings":["DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil"],"affiliations":[{"raw_affiliation_string":"DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil","institution_ids":["https://openalex.org/I35046152"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063622010","display_name":"Diego V. Cirilo do Nascimento","orcid":"https://orcid.org/0000-0002-0650-6323"},"institutions":[{"id":"https://openalex.org/I3020002803","display_name":"Instituto Federal do Rio Grande do Norte","ror":"https://ror.org/04je48v27","country_code":"BR","type":"education","lineage":["https://openalex.org/I3020002803"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Diego V. C. Nascimento","raw_affiliation_strings":["Federal Institute of Rio Grande do Norte - IFRN,Natal-RN,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal Institute of Rio Grande do Norte - IFRN,Natal-RN,Brazil","institution_ids":["https://openalex.org/I3020002803"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089704252","display_name":"Tiago Barros","orcid":"https://orcid.org/0000-0001-9665-2238"},"institutions":[{"id":"https://openalex.org/I35046152","display_name":"Universidade Federal do Rio Grande do Norte","ror":"https://ror.org/04wn09761","country_code":"BR","type":"education","lineage":["https://openalex.org/I35046152"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Tiago Barros","raw_affiliation_strings":["DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil"],"affiliations":[{"raw_affiliation_string":"DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil","institution_ids":["https://openalex.org/I35046152"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068745057","display_name":"Samuel Xavier\u2010de\u2010Souza","orcid":"https://orcid.org/0000-0001-8747-4580"},"institutions":[{"id":"https://openalex.org/I35046152","display_name":"Universidade Federal do Rio Grande do Norte","ror":"https://ror.org/04wn09761","country_code":"BR","type":"education","lineage":["https://openalex.org/I35046152"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Samuel Xavier-de-Souza","raw_affiliation_strings":["DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil"],"affiliations":[{"raw_affiliation_string":"DCA Federal University of Rio Grande do Norte - UFRN,Department of Computer Engineering and Automation,Natal-RN,Brazil","institution_ids":["https://openalex.org/I35046152"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5090681629"],"corresponding_institution_ids":["https://openalex.org/I35046152"],"apc_list":null,"apc_paid":null,"fwci":0.0915,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.4121854,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-scaling","display_name":"Frequency scaling","score":0.8545458316802979},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8222574591636658},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7228448390960693},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.6661759614944458},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.588950514793396},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5259652137756348},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.472844660282135},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.4593818783760071},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.4524097740650177},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.452104777097702},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.43018263578414917},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.42408889532089233},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4163854718208313},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41568273305892944},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.41120344400405884},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36158204078674316},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11668065190315247},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10795378684997559},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0687725841999054}],"concepts":[{"id":"https://openalex.org/C157742956","wikidata":"https://www.wikidata.org/wiki/Q3237776","display_name":"Frequency scaling","level":3,"score":0.8545458316802979},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8222574591636658},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7228448390960693},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.6661759614944458},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.588950514793396},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5259652137756348},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.472844660282135},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.4593818783760071},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.4524097740650177},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.452104777097702},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.43018263578414917},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.42408889532089233},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4163854718208313},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41568273305892944},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.41120344400405884},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36158204078674316},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11668065190315247},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10795378684997559},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0687725841999054},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc54400.2022.9939597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc54400.2022.9939597","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2023571465","https://openalex.org/W2098163907","https://openalex.org/W2154169726","https://openalex.org/W2490345425","https://openalex.org/W2519730952","https://openalex.org/W2905500442","https://openalex.org/W3020414749","https://openalex.org/W3022024970","https://openalex.org/W3115759401","https://openalex.org/W3145747011"],"related_works":["https://openalex.org/W2539473121","https://openalex.org/W2960456644","https://openalex.org/W4252084893","https://openalex.org/W2312282667","https://openalex.org/W1652198943","https://openalex.org/W2027268352","https://openalex.org/W1972953980","https://openalex.org/W2909194634","https://openalex.org/W2758151830","https://openalex.org/W1510566755"],"abstract_inverted_index":{"Several":[0],"studies":[1],"have":[2],"been":[3],"published":[4],"to":[5,42,46,63,81,105],"discuss":[6],"methods":[7],"of":[8,85,91,114],"making":[9],"components,":[10],"such":[11,22],"as":[12,23],"CPUs,":[13],"GPUs,":[14],"and":[15,26,30],"FPGAs,":[16],"more":[17],"energy":[18],"efficient.":[19],"Well-known":[20],"techniques":[21],"dynamic":[24],"voltage":[25,38,59,95],"frequency":[27],"scaling":[28],"(DVFS)":[29],"power":[31,43],"gating":[32],"are":[33,109],"alternatives":[34],"since":[35],"the":[36,53,74,83,99],"supply":[37,94],"is":[39,79],"directly":[40],"related":[41],"consumption.":[44],"However,":[45],"guarantee":[47],"correct":[48],"operation":[49],"without":[50],"critical-path-timing":[51],"violations,":[52],"systems":[54],"must":[55],"impose":[56],"conservative":[57],"static":[58],"guardbands.":[60],"We":[61],"propose":[62],"create":[64],"a":[65,86],"predictive":[66],"guardband":[67],"reduction":[68],"technique":[69],"for":[70],"CPUs":[71],"by":[72,97,111],"analyzing":[73],"cached":[75],"instructions.":[76,115],"The":[77],"contribution":[78],"expected":[80],"be":[82],"development":[84],"machine":[87],"learning":[88],"solution":[89],"capable":[90],"reducing":[92],"average":[93],"levels":[96],"capturing":[98],"intrisic":[100],"critical":[101],"path":[102],"variations":[103],"according":[104],"which":[106],"internal":[107],"circuits":[108],"used":[110],"different":[112],"sets":[113]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}