{"id":"https://openalex.org/W4308575560","doi":"https://doi.org/10.1109/vlsi-soc54400.2022.9939596","title":"RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support","display_name":"RISC-V Processor Trace Encoder with Multiple Instructions Retirement Support","publication_year":2022,"publication_date":"2022-10-03","ids":{"openalex":"https://openalex.org/W4308575560","doi":"https://doi.org/10.1109/vlsi-soc54400.2022.9939596"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc54400.2022.9939596","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc54400.2022.9939596","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013749399","display_name":"Halil K\u00fckner","orcid":null},"institutions":[{"id":"https://openalex.org/I56303344","display_name":"Aselsan (Turkey)","ror":"https://ror.org/04knh8e66","country_code":"TR","type":"company","lineage":["https://openalex.org/I56303344"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Halil Kukner","raw_affiliation_strings":["Defence System Technologies (SST),ASELSAN,Ankara,Turkey","ASELSAN, Defence System Technologies (SST), Ankara, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Defence System Technologies (SST),ASELSAN,Ankara,Turkey","institution_ids":["https://openalex.org/I56303344"]},{"raw_affiliation_string":"ASELSAN, Defence System Technologies (SST), Ankara, Turkey","institution_ids":["https://openalex.org/I56303344"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049609498","display_name":"Gokhan Kaplayan","orcid":null},"institutions":[{"id":"https://openalex.org/I56303344","display_name":"Aselsan (Turkey)","ror":"https://ror.org/04knh8e66","country_code":"TR","type":"company","lineage":["https://openalex.org/I56303344"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Gokhan Kaplayan","raw_affiliation_strings":["Defence System Technologies (SST),ASELSAN,Ankara,Turkey","ASELSAN, Defence System Technologies (SST), Ankara, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Defence System Technologies (SST),ASELSAN,Ankara,Turkey","institution_ids":["https://openalex.org/I56303344"]},{"raw_affiliation_string":"ASELSAN, Defence System Technologies (SST), Ankara, Turkey","institution_ids":["https://openalex.org/I56303344"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043382300","display_name":"Ahmet Efe","orcid":"https://orcid.org/0000-0002-2691-7517"},"institutions":[{"id":"https://openalex.org/I56303344","display_name":"Aselsan (Turkey)","ror":"https://ror.org/04knh8e66","country_code":"TR","type":"company","lineage":["https://openalex.org/I56303344"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Ahmet Efe","raw_affiliation_strings":["Defence System Technologies (SST),ASELSAN,Ankara,Turkey","ASELSAN, Defence System Technologies (SST), Ankara, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Defence System Technologies (SST),ASELSAN,Ankara,Turkey","institution_ids":["https://openalex.org/I56303344"]},{"raw_affiliation_string":"ASELSAN, Defence System Technologies (SST), Ankara, Turkey","institution_ids":["https://openalex.org/I56303344"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054455387","display_name":"Mehmet Ali G\u00fclden","orcid":"https://orcid.org/0000-0002-4845-7523"},"institutions":[{"id":"https://openalex.org/I56303344","display_name":"Aselsan (Turkey)","ror":"https://ror.org/04knh8e66","country_code":"TR","type":"company","lineage":["https://openalex.org/I56303344"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Mehmet Ali Gulden","raw_affiliation_strings":["Defence System Technologies (SST),ASELSAN,Ankara,Turkey","ASELSAN, Defence System Technologies (SST), Ankara, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Defence System Technologies (SST),ASELSAN,Ankara,Turkey","institution_ids":["https://openalex.org/I56303344"]},{"raw_affiliation_string":"ASELSAN, Defence System Technologies (SST), Ankara, Turkey","institution_ids":["https://openalex.org/I56303344"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I56303344"],"apc_list":null,"apc_paid":null,"fwci":1.239,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.76218605,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7908395528793335},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.7242364883422852},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.6419762372970581},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.6312174201011658},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5649867653846741},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5619685053825378},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.52638840675354},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.466716468334198},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4514835476875305},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4230685532093048},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2093859612941742}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7908395528793335},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.7242364883422852},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.6419762372970581},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.6312174201011658},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5649867653846741},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5619685053825378},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.52638840675354},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.466716468334198},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4514835476875305},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4230685532093048},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2093859612941742},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc54400.2022.9939596","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc54400.2022.9939596","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.47999998927116394,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1976401811","https://openalex.org/W2094244044","https://openalex.org/W2107072790","https://openalex.org/W2136795172","https://openalex.org/W2146280225","https://openalex.org/W6644319285","https://openalex.org/W6674079870"],"related_works":["https://openalex.org/W2538644970","https://openalex.org/W4200599950","https://openalex.org/W2128502296","https://openalex.org/W4376881175","https://openalex.org/W4310584696","https://openalex.org/W4250432526","https://openalex.org/W4237840813","https://openalex.org/W4385730960","https://openalex.org/W2496196108","https://openalex.org/W2993622674"],"abstract_inverted_index":{"In":[0,57],"complex":[1],"processor":[2,25,51,82,91,119,165],"micro-architectures":[3],"with":[4,127],"multi-cores,":[5],"multiple-issue,":[6],"out-of-order":[7],"execution":[8,46],"schemes,":[9],"etc.,":[10],"it":[11],"is":[12,48,102,105],"crucial":[13],"to":[14,17,22,141],"be":[15],"able":[16],"trace":[18],"the":[19,41,76,86,123,128,133,160,164],"program":[20],"flow":[21,47],"design":[23,64],"a":[24,44,62,68,99,117,149,168],"hardware":[26,52,63],"and":[27,36,53,65,111,121,155],"software":[28,54],"as":[29,31],"bug-free":[30],"possible":[32],"for":[33,89],"reliability,":[34],"safety":[35],"mission":[37],"critical":[38],"systems.":[39],"Therefore,":[40],"trace-ability":[42],"of":[43,67,107,114,153,159],"program\u2019s":[45],"significant":[49],"during":[50],"development":[55],"cycles.":[56],"this":[58],"paper,":[59],"we":[60],"present":[61],"implementation":[66],"Trace":[69,88,124,145],"Encoder":[70,125,146],"Intellectual":[71],"Property":[72],"(IP)":[73],"that":[74,104],"supports":[75],"multiple":[77,112],"instructions":[78],"retirement":[79,113],"on":[80],"RISC-V":[81,90],"cores.":[83],"Implementation":[84],"follows":[85],"Efficient":[87],"non-Instruction":[92],"Set":[93],"Architecture":[94],"(non-ISA)":[95],"specification":[96],"[1].":[97],"Moreover,":[98],"novel":[100],"algorithm":[101],"introduced":[103],"capable":[106],"capturing":[108],"both":[109],"single":[110],"micro-operations":[115],"in":[116,167],"multiple-issue":[118],"core,":[120],"feeding":[122],"IP":[126,147],"correct":[129],"micro-operation":[130],"sequence":[131],"through":[132],"ingress":[134],"port.":[135],"Results":[136],"show":[137],"encoding":[138],"ratios":[139],"down":[140],"2.11":[142],"bits/instruction.":[143],"The":[144],"has":[148],"low":[150],"area":[151],"overhead":[152],"3.74%,":[154],"only":[156],"consumes":[157],"3.41%":[158],"total":[161],"power":[162],"w.r.t.":[163],"core":[166],"commercial":[169],"28":[170],"nm":[171],"CMOS":[172],"process.":[173]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}