{"id":"https://openalex.org/W3212430008","doi":"https://doi.org/10.1109/vlsi-soc53125.2021.9606966","title":"Towards Reliable In-Memory Computing:From Emerging Devices to Post-von-Neumann Architectures","display_name":"Towards Reliable In-Memory Computing:From Emerging Devices to Post-von-Neumann Architectures","publication_year":2021,"publication_date":"2021-10-04","ids":{"openalex":"https://openalex.org/W3212430008","doi":"https://doi.org/10.1109/vlsi-soc53125.2021.9606966","mag":"3212430008"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc53125.2021.9606966","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc53125.2021.9606966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Hussam Amrouch","orcid":null},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Hussam Amrouch","raw_affiliation_strings":["University of Stuttgart Institute of Computer Engineering and Computer Architecture Stuttgart, Germany"],"affiliations":[{"raw_affiliation_string":"University of Stuttgart Institute of Computer Engineering and Computer Architecture Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044937811","display_name":"Nan Du","orcid":"https://orcid.org/0000-0002-7775-7795"},"institutions":[{"id":"https://openalex.org/I2610724","display_name":"Chemnitz University of Technology","ror":"https://ror.org/00a208s56","country_code":"DE","type":"education","lineage":["https://openalex.org/I2610724"]},{"id":"https://openalex.org/I2801349226","display_name":"Leibniz Institute of Photonic Technology","ror":"https://ror.org/02se0t636","country_code":"DE","type":"facility","lineage":["https://openalex.org/I2801349226","https://openalex.org/I315704651"]},{"id":"https://openalex.org/I4210120526","display_name":"Fraunhofer Institute for Electronic Nano Systems","ror":"https://ror.org/02h12bg79","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210120526","https://openalex.org/I4923324"]},{"id":"https://openalex.org/I76198965","display_name":"Friedrich Schiller University Jena","ror":"https://ror.org/05qpz1x62","country_code":"DE","type":"education","lineage":["https://openalex.org/I76198965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Nan Du","raw_affiliation_strings":["Department Nano Device Technology Chemnitz, Fraunhofer Institute for Electronic Nano Systems (ENAS), Germany","Department of Quantum Detection Jena, Leibniz Institute of Photonic Technology, Germany","Faculty of Electrical Engineering and Information Technology, Chemnitz University of Technology, Chemnitz, Germany","Friedrich Schiller University Jena, Institute for Solid State Physics, Jena, Germany"],"affiliations":[{"raw_affiliation_string":"Department Nano Device Technology Chemnitz, Fraunhofer Institute for Electronic Nano Systems (ENAS), Germany","institution_ids":["https://openalex.org/I4210120526"]},{"raw_affiliation_string":"Department of Quantum Detection Jena, Leibniz Institute of Photonic Technology, Germany","institution_ids":["https://openalex.org/I2801349226"]},{"raw_affiliation_string":"Faculty of Electrical Engineering and Information Technology, Chemnitz University of Technology, Chemnitz, Germany","institution_ids":["https://openalex.org/I2610724"]},{"raw_affiliation_string":"Friedrich Schiller University Jena, Institute for Solid State Physics, Jena, Germany","institution_ids":["https://openalex.org/I76198965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020422864","display_name":"Anteneh Gebregiorgis","orcid":"https://orcid.org/0000-0002-8408-5691"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Anteneh Gebregiorgis","raw_affiliation_strings":["Department of Quantum and Computer Engineering, Delft University of Technology, Delft, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Department of Quantum and Computer Engineering, Delft University of Technology, Delft, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Said Hamdioui","raw_affiliation_strings":["Department of Quantum and Computer Engineering, Delft University of Technology, Delft, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Department of Quantum and Computer Engineering, Delft University of Technology, Delft, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027416202","display_name":"Ilia Polian","orcid":"https://orcid.org/0000-0002-6563-2725"},"institutions":[{"id":"https://openalex.org/I100066346","display_name":"University of Stuttgart","ror":"https://ror.org/04vnq7t77","country_code":"DE","type":"education","lineage":["https://openalex.org/I100066346"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ilia Polian","raw_affiliation_strings":["University of Stuttgart Institute of Computer Engineering and Computer Architecture Stuttgart, Germany"],"affiliations":[{"raw_affiliation_string":"University of Stuttgart Institute of Computer Engineering and Computer Architecture Stuttgart, Germany","institution_ids":["https://openalex.org/I100066346"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I100066346"],"apc_list":null,"apc_paid":null,"fwci":1.7274,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.84699771,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.8841593265533447},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7029482126235962},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.6905391216278076},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.6872861385345459},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.5208033323287964},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4681174159049988},{"id":"https://openalex.org/keywords/edge-computing","display_name":"Edge computing","score":0.4665956497192383},{"id":"https://openalex.org/keywords/unconventional-computing","display_name":"Unconventional computing","score":0.4582613408565521},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4579450488090515},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.42722004652023315},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4229179620742798},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3377295732498169},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.33393537998199463},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.26885876059532166},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.25246739387512207},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2190835177898407},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1643669605255127},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10805505514144897},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09978705644607544}],"concepts":[{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.8841593265533447},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7029482126235962},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.6905391216278076},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.6872861385345459},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.5208033323287964},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4681174159049988},{"id":"https://openalex.org/C2778456923","wikidata":"https://www.wikidata.org/wiki/Q5337692","display_name":"Edge computing","level":3,"score":0.4665956497192383},{"id":"https://openalex.org/C23375383","wikidata":"https://www.wikidata.org/wiki/Q176499","display_name":"Unconventional computing","level":2,"score":0.4582613408565521},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4579450488090515},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.42722004652023315},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4229179620742798},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3377295732498169},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.33393537998199463},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.26885876059532166},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.25246739387512207},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2190835177898407},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1643669605255127},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10805505514144897},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09978705644607544},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/vlsi-soc53125.2021.9606966","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc53125.2021.9606966","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IFIP/IEEE 29th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},{"id":"pmh:oai:null:publica/417168","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/417168","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"conference paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W1439015800","https://openalex.org/W2061860832","https://openalex.org/W2067636729","https://openalex.org/W2081729575","https://openalex.org/W2090413838","https://openalex.org/W2135587520","https://openalex.org/W2163818407","https://openalex.org/W2288365131","https://openalex.org/W2396622873","https://openalex.org/W2416799949","https://openalex.org/W2508602506","https://openalex.org/W2518281301","https://openalex.org/W2526202524","https://openalex.org/W2526604659","https://openalex.org/W2604319603","https://openalex.org/W2606722458","https://openalex.org/W2738894409","https://openalex.org/W2775637085","https://openalex.org/W2791359478","https://openalex.org/W2796625795","https://openalex.org/W2805467605","https://openalex.org/W2899544551","https://openalex.org/W2909452884","https://openalex.org/W2988640543","https://openalex.org/W2990591126","https://openalex.org/W3009643182","https://openalex.org/W3015724253","https://openalex.org/W3015893802","https://openalex.org/W3033330790","https://openalex.org/W3091745343","https://openalex.org/W3093475241","https://openalex.org/W3101421194","https://openalex.org/W3104353813","https://openalex.org/W3128698472","https://openalex.org/W3137833672","https://openalex.org/W3158216680","https://openalex.org/W3159974581","https://openalex.org/W3167846368","https://openalex.org/W3179266694","https://openalex.org/W4210786061","https://openalex.org/W4254901135","https://openalex.org/W6727522133","https://openalex.org/W6749542541"],"related_works":["https://openalex.org/W4280603410","https://openalex.org/W3168779557","https://openalex.org/W3212430008","https://openalex.org/W4322580884","https://openalex.org/W2765081478","https://openalex.org/W2019583921","https://openalex.org/W2966740705","https://openalex.org/W4308071516","https://openalex.org/W4363651564","https://openalex.org/W2431884816"],"abstract_inverted_index":{"Breakthroughs":[0],"in":[1,43,73],"Deep":[2],"neural":[3],"networks":[4],"(DNNs)":[5],"steadily":[6],"bring":[7],"new":[8],"innovations":[9],"that":[10,100],"substantially":[11],"improve":[12],"our":[13,19],"daily":[14],"life.":[15],"However,":[16],"DNNs":[17,84],"overwhelm":[18],"existing":[20],"computer":[21],"architectures":[22,117],"because":[23],"the":[24,30,44,53,62,95,164,168],"latter":[25],"is":[26],"largely":[27],"bottlenecked":[28],"by":[29],"data":[31,55,99],"movement":[32],"between":[33,61],"memory":[34],"and":[35,59,70,80,90,138,160],"processing":[36,64],"units.":[37],"As":[38],"a":[39,86,108],"matter":[40],"of":[41,98,148],"fact,":[42],"current":[45],"von-Neumann":[46],"architecture,":[47],"which":[48],"has":[49],"remained":[50],"unchanged":[51],"since":[52],"beginning,":[54],"repeatedly":[56],"moves":[57],"back":[58],"forth":[60],"physically-separated":[63],"units":[65],"(e.g.,":[66],"CPU,":[67],"accelerator,":[68],"etc.)":[69],"memory.":[71],"This,":[72],"turn,":[74],"inevitably":[75],"leads":[76],"to":[77,94,158,167],"large":[78],"latency":[79],"efficiency":[81],"losses.":[82],"In":[83],"such":[85],"bottleneck":[87],"becomes":[88],"more":[89,91],"prominent":[92],"due":[93],"massive":[96],"amount":[97],"must":[101],"be":[102,119,151,175],"frequently":[103],"transferred.":[104],"This":[105],"paper":[106],"provides":[107],"cross-layer":[109],"overview":[110],"on":[111,177],"how":[112],"post-von-Neumann":[113],"in-memory":[114],"computing":[115],"(IMC)":[116],"can":[118],"realized":[120],"using":[121],"three":[122],"different":[123],"emerging":[124],"technologies:":[125],"Charge-based":[126],"ferroelectric":[127],"transistors":[128],"for":[129,134,143],"logic-in-memory":[130],"computations;":[131],"memristive":[132],"devices":[133],"unconventional":[135],"brain-inspired":[136],"computing;":[137],"ultra-low-power":[139],"memristors":[140],"especially":[141],"suitable":[142],"Edge":[144],"AI.":[145],"Various":[146],"levels":[147,162],"abstraction":[149],"will":[150,174],"covered":[152],"starting":[153],"from":[154],"semiconductor":[155],"device":[156],"physics":[157],"circuit":[159],"microarchitecture":[161],"all":[163],"way":[165],"up":[166],"system":[169],"level,":[170],"but":[171],"special":[172],"attention":[173],"put":[176],"reliability":[178],"aspects.":[179]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":3}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}