{"id":"https://openalex.org/W3131522514","doi":"https://doi.org/10.1109/vlsi-soc46417.2020.9344089","title":"Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow","display_name":"Layout Considerations of Logic Designs Using an N-layer 3D Nanofabric Process Flow","publication_year":2020,"publication_date":"2020-10-05","ids":{"openalex":"https://openalex.org/W3131522514","doi":"https://doi.org/10.1109/vlsi-soc46417.2020.9344089","mag":"3131522514"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc46417.2020.9344089","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc46417.2020.9344089","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055536889","display_name":"Edouard Giacomin","orcid":"https://orcid.org/0000-0002-5415-1870"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Edouard Giacomin","raw_affiliation_strings":["University of Utah, Salt Lake City, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071436641","display_name":"Juergen Boemmels","orcid":"https://orcid.org/0000-0002-8761-5213"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Juergen Boemmels","raw_affiliation_strings":["IMEC, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103112055","display_name":"Julien Ryckaert","orcid":"https://orcid.org/0009-0001-0140-3042"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Julien Ryckaert","raw_affiliation_strings":["IMEC, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033235745","display_name":"Francky Catthoor","orcid":"https://orcid.org/0000-0002-3599-8515"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Francky Catthoor","raw_affiliation_strings":["3KU Leuven, Leuven, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"3KU Leuven, Leuven, Belgium","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002568331","display_name":"Pierre\u2010Emmanuel Gaillardon","orcid":"https://orcid.org/0000-0003-3634-3999"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Pierre-Emmanuel Gaillardon","raw_affiliation_strings":["University of Utah, Salt Lake City, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"34","last_page":"39"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6933833360671997},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.6688409447669983},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5840768218040466},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.5651963353157043},{"id":"https://openalex.org/keywords/footprint","display_name":"Footprint","score":0.4940231442451477},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.47785255312919617},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4507656991481781},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4497704803943634},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.44821515679359436},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41998475790023804},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3761374056339264},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36660104990005493},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35390496253967285},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3496437668800354},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27931833267211914},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.21976402401924133},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13803765177726746}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6933833360671997},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.6688409447669983},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5840768218040466},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.5651963353157043},{"id":"https://openalex.org/C132943942","wikidata":"https://www.wikidata.org/wiki/Q2562511","display_name":"Footprint","level":2,"score":0.4940231442451477},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.47785255312919617},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4507656991481781},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4497704803943634},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.44821515679359436},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41998475790023804},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3761374056339264},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36660104990005493},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35390496253967285},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3496437668800354},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27931833267211914},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.21976402401924133},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13803765177726746},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc46417.2020.9344089","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc46417.2020.9344089","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IFIP/IEEE 28th International Conference on Very Large Scale Integration (VLSI-SOC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.47999998927116394,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1587386427","https://openalex.org/W1966797259","https://openalex.org/W2034975188","https://openalex.org/W2145601433","https://openalex.org/W2146704626","https://openalex.org/W2147560018","https://openalex.org/W2209394967","https://openalex.org/W2346205343","https://openalex.org/W2525903134","https://openalex.org/W2578406675","https://openalex.org/W2731422849","https://openalex.org/W2787438330","https://openalex.org/W2920916186","https://openalex.org/W2922344031","https://openalex.org/W6760783378"],"related_works":["https://openalex.org/W2543290882","https://openalex.org/W2075511834","https://openalex.org/W2136725189","https://openalex.org/W2004826944","https://openalex.org/W4382052447","https://openalex.org/W2037756218","https://openalex.org/W2152991730","https://openalex.org/W3128011803","https://openalex.org/W3182711606","https://openalex.org/W3131522514"],"abstract_inverted_index":{"In":[0,90,169],"the":[1,21,35,72,76,83,87,146,164,175,180,184,209],"past":[2],"few":[3],"years,":[4],"novel":[5],"fabrication":[6],"schemes":[7],"such":[8],"as":[9],"parallel":[10,50],"and":[11,38,79,100,183,189],"monolithic":[12,59],"3D":[13,51,60,107,111,165],"integration":[14,108],"have":[15],"been":[16],"proposed":[17],"to":[18,45,71,163,193,204,219],"keep":[19],"sustaining":[20],"need":[22],"for":[23,142],"more":[24],"powerful":[25],"integrated":[26],"circuits.":[27],"By":[28,135],"stacking":[29,201],"several":[30,191],"devices,":[31],"wafers,":[32],"or":[33],"dies,":[34],"footprint,":[36],"delay,":[37],"power":[39],"can":[40,156],"be":[41,158],"decreased":[42],"when":[43,217],"compared":[44,218],"traditional":[46],"2D":[47],"implementations.":[48],"While":[49],"does":[52],"not":[53],"enable":[54],"very":[55],"fine-grained":[56],"vertical":[57,121,144,154],"connections,":[58],"currently":[61],"only":[62],"offers":[63],"a":[64,105,137,206,220],"limited":[65],"number":[66],"of":[67,75,85,116],"transistor":[68],"tiers":[69],"due":[70],"high":[73],"cost":[74],"additional":[77],"masks":[78],"processing":[80],"steps,":[81],"limiting":[82],"benefits":[84],"using":[86,136],"third":[88],"dimension.":[89],"this":[91],"paper,":[92],"we":[93,172],"introduce":[94],"an":[95],"innovative":[96],"planar":[97],"circuit":[98],"netlist":[99],"layout":[101,176],"approach,":[102],"which":[103],"enables":[104],"new":[106],"flow":[109,148,182],"called":[110],"Nanofabric.":[112],"The":[113],"flow,":[114],"consisting":[115],"<tex":[117,214],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[118,215],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$N$</tex>":[119],"identical":[120],"tiers,":[122],"is":[123,149,211],"aimed":[124],"at":[125,160],"single":[126,138],"instruction":[127],"multiple":[128,153],"data":[129],"processor":[130],"Arithmetic":[131],"Logic":[132],"Units":[133],"(ALUs).":[134],"metal":[139,186],"routing":[140],"layer":[141,187],"each":[143],"tier,":[145],"process":[147],"significantly":[150],"simplified":[151],"since":[152],"layers":[155,203],"potentially":[157],"patterned":[159],"once,":[161],"similar":[162],"NAND":[166],"flash":[167],"process.":[168],"our":[170],"study,":[171],"thoroughly":[173],"investigate":[174],"constraints":[177],"arising":[178],"from":[179],"Nanofabric":[181],"unique":[185],"rule":[188],"propose":[190],"ways":[192],"overcome":[194],"them.":[195],"We":[196],"then":[197],"show":[198],"that":[199],"by":[200,213],"32":[202],"build":[205],"32-bit":[207],"ALU,":[208],"footprint":[210],"reduced":[212],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$8.7\\times$</tex>":[216],"conventional":[221],"7nm":[222],"FinFET":[223],"implementation.":[224]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3}],"updated_date":"2026-07-15T18:14:33.161393","created_date":"2025-10-10T00:00:00"}