{"id":"https://openalex.org/W2992137891","doi":"https://doi.org/10.1109/vlsi-soc.2019.8920342","title":"CongestionNet: Routing Congestion Prediction Using Deep Graph Neural Networks","display_name":"CongestionNet: Routing Congestion Prediction Using Deep Graph Neural Networks","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W2992137891","doi":"https://doi.org/10.1109/vlsi-soc.2019.8920342","mag":"2992137891"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2019.8920342","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2019.8920342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083523340","display_name":"Robert M. Kirby","orcid":"https://orcid.org/0000-0001-5712-4141"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Robert Kirby","raw_affiliation_strings":["Nvidia, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Nvidia, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076191186","display_name":"Saad Godil","orcid":"https://orcid.org/0000-0002-6469-2064"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Saad Godil","raw_affiliation_strings":["Nvidia, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Nvidia, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032799025","display_name":"Rajarshi Roy","orcid":"https://orcid.org/0000-0003-4548-2114"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajarshi Roy","raw_affiliation_strings":["Nvidia, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Nvidia, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066242985","display_name":"Bryan Catanzaro","orcid":"https://orcid.org/0000-0003-0034-7728"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bryan Catanzaro","raw_affiliation_strings":["Nvidia, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Nvidia, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5083523340"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":2.1694,"has_fulltext":false,"cited_by_count":78,"citation_normalized_percentile":{"value":0.88252787,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"217","last_page":"222"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7301634550094604},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.6839383840560913},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5946578979492188},{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.5903034806251526},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2600167989730835},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1697690188884735},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.16755226254463196}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7301634550094604},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.6839383840560913},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5946578979492188},{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.5903034806251526},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2600167989730835},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1697690188884735},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.16755226254463196},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2019.8920342","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2019.8920342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1675335411","https://openalex.org/W1969859981","https://openalex.org/W1972047514","https://openalex.org/W2090971357","https://openalex.org/W2093513607","https://openalex.org/W2096117010","https://openalex.org/W2099184857","https://openalex.org/W2101427886","https://openalex.org/W2103626283","https://openalex.org/W2112547226","https://openalex.org/W2119354760","https://openalex.org/W2148618168","https://openalex.org/W2159635563","https://openalex.org/W2167841124","https://openalex.org/W2899885603","https://openalex.org/W2945759188","https://openalex.org/W2964015378","https://openalex.org/W3140720939","https://openalex.org/W4229795991","https://openalex.org/W4231151455","https://openalex.org/W4231437154","https://openalex.org/W4250398923","https://openalex.org/W4255554251","https://openalex.org/W4297733535","https://openalex.org/W6726873649"],"related_works":["https://openalex.org/W2128446417","https://openalex.org/W2148325338","https://openalex.org/W2099664662","https://openalex.org/W2187261215","https://openalex.org/W1568441862","https://openalex.org/W2157522838","https://openalex.org/W2997716136","https://openalex.org/W2169510384","https://openalex.org/W2045697850","https://openalex.org/W3012039632"],"abstract_inverted_index":{"As":[0],"feature":[1],"size":[2],"shrinks,":[3],"routing":[4,60,89,105],"constraints":[5],"become":[6],"a":[7,96,109,150,213],"more":[8,70],"significant":[9],"limiting":[10],"factor":[11],"to":[12,49,66,120,131,134,140,167,205,224],"the":[13,39,53,154,192,196],"manufacturability":[14],"of":[15,59,198],"VLSI":[16],"designs.":[17],"Routing":[18],"congestion":[19,31,106,137,142,165,190],"significantly":[20],"impacts":[21],"quality":[22],"metrics":[23,139,203],"such":[24],"as":[25],"area":[26],"and":[27,44,77,122],"timing":[28],"performance,":[29],"but":[30],"is":[32,162,210],"not":[33],"known":[34],"accurately":[35],"until":[36],"late":[37],"in":[38,153],"design":[40,54,64],"cycle,":[41],"after":[42],"placement":[43,85,145],"routing.":[45],"This":[46,114],"can":[47,83,116],"lead":[48],"unpleasant":[50],"surprises":[51],"during":[52],"process.":[55],"Accordingly,":[56],"early":[57,118],"prediction":[58,138],"requirements":[61],"would":[62],"enable":[63],"engineers":[65],"iterate":[67],"faster,":[68],"with":[69,215,228],"confidence":[71],"that":[72,127],"their":[73],"designs":[74],"were":[75],"routable":[76],"high":[78],"quality.":[79],"Additionally,":[80,207],"routability":[81],"estimates":[82],"inform":[84],"itself,":[86],"preemptively":[87],"eliminating":[88],"problems.":[90],"In":[91],"this":[92],"work,":[93],"we":[94,178],"present":[95],"graph-based":[97],"deep":[98],"learning":[99],"method":[100],"for":[101,182,191,231],"quickly":[102],"predicting":[103,164,183,189],"logic-induced":[104],"hotspots":[107,143],"from":[108],"gate-level":[110],"netlist":[111],"before":[112],"placement.":[113],"model":[115],"provide":[117],"feedback":[119],"designers":[121],"EDA":[123],"tools,":[124],"indicating":[125],"logic":[126,169],"may":[128],"be":[129],"difficult":[130],"route.":[132],"Compared":[133],"using":[135],"previous":[136,202],"predict":[141,225],"without":[144],"information,":[146],"our":[147,160,199,208,219],"solution":[148,200],"provides":[149],"29%":[151],"increase":[152],"Kendall":[155],"ranking":[156],"correlation":[157],"score.":[158],"Because":[159],"focus":[161],"on":[163,174],"due":[166],"local":[168],"structure,":[170],"which":[171],"manifests":[172],"itself":[173],"lower":[175,184,193],"metal":[176,185,194],"layers,":[177,195],"also":[179],"report":[180],"accuracy":[181],"layer":[186],"congestion.":[187],"When":[188],"benefit":[197],"over":[201],"increases":[204],"75%.":[206],"approach":[209,220],"fast.":[211],"On":[212],"circuit":[214],"1.3":[216],"million":[217],"cells,":[218],"takes":[221],"19":[222],"seconds":[223],"congestion,":[226],"compared":[227],"10-60":[229],"minutes":[230],"other":[232],"methods.":[233]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":21},{"year":2024,"cited_by_count":20},{"year":2023,"cited_by_count":18},{"year":2022,"cited_by_count":11},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2026-03-13T16:22:10.518609","created_date":"2025-10-10T00:00:00"}