{"id":"https://openalex.org/W2992886344","doi":"https://doi.org/10.1109/vlsi-soc.2019.8920314","title":"Automated Synthesis of Multi-Port Memories and Control","display_name":"Automated Synthesis of Multi-Port Memories and Control","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W2992886344","doi":"https://doi.org/10.1109/vlsi-soc.2019.8920314","mag":"2992886344"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2019.8920314","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2019.8920314","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://escholarship.org/content/qt7047n3k0/qt7047n3k0.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049626121","display_name":"Hunter Nichols","orcid":"https://orcid.org/0000-0002-2119-6140"},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hunter Nichols","raw_affiliation_strings":["Computer Science and Engineering, University of California Santa Cruz, Santa Cruz"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of California Santa Cruz, Santa Cruz","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027848245","display_name":"Michael Grimes","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Grimes","raw_affiliation_strings":["Computer Science and Engineering, University of California Santa Cruz, Santa Cruz"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of California Santa Cruz, Santa Cruz","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072634606","display_name":"Jennifer Eve Sowash","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jennifer Sowash","raw_affiliation_strings":["Computer Science and Engineering, University of California Santa Cruz, Santa Cruz"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of California Santa Cruz, Santa Cruz","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017305106","display_name":"Jesse Cirimelli-Low","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jesse Cirimelli-Low","raw_affiliation_strings":["Computer Science and Engineering, University of California Santa Cruz, Santa Cruz"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of California Santa Cruz, Santa Cruz","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065218759","display_name":"Matthew R. Guthaus","orcid":"https://orcid.org/0000-0002-8113-4531"},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Matthew R. Guthaus","raw_affiliation_strings":["Computer Science and Engineering, University of California Santa Cruz, Santa Cruz"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of California Santa Cruz, Santa Cruz","institution_ids":["https://openalex.org/I185103710"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I185103710"],"apc_list":null,"apc_paid":null,"fwci":0.3633,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.628601,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"33","issue":null,"first_page":"59","last_page":"64"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7914055585861206},{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.7886438369750977},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7111946940422058},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.6565978527069092},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.646884024143219},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5518121719360352},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5094218850135803},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.49627310037612915},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34371164441108704},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1764598786830902},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12967577576637268},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.10514965653419495},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10401636362075806}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7914055585861206},{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.7886438369750977},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7111946940422058},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.6565978527069092},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.646884024143219},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5518121719360352},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5094218850135803},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.49627310037612915},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34371164441108704},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1764598786830902},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12967577576637268},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.10514965653419495},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10401636362075806},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/vlsi-soc.2019.8920314","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2019.8920314","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},{"id":"pmh:oai:escholarship.org:ark:/13030/qt7047n3k0","is_oa":true,"landing_page_url":"https://escholarship.org/uc/item/7047n3k0","pdf_url":"https://escholarship.org/content/qt7047n3k0/qt7047n3k0.pdf","source":{"id":"https://openalex.org/S4306400115","display_name":"eScholarship (California Digital Library)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2801248553","host_organization_name":"California Digital Library","host_organization_lineage":["https://openalex.org/I2801248553"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:escholarship.org:ark:/13030/qt7047n3k0","is_oa":true,"landing_page_url":"https://escholarship.org/uc/item/7047n3k0","pdf_url":"https://escholarship.org/content/qt7047n3k0/qt7047n3k0.pdf","source":{"id":"https://openalex.org/S4306400115","display_name":"eScholarship (California Digital Library)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I2801248553","host_organization_name":"California Digital Library","host_organization_lineage":["https://openalex.org/I2801248553"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5099999904632568,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2992886344.pdf","grobid_xml":"https://content.openalex.org/works/W2992886344.grobid-xml"},"referenced_works_count":12,"referenced_works":["https://openalex.org/W1964144929","https://openalex.org/W2053693506","https://openalex.org/W2088115909","https://openalex.org/W2100483769","https://openalex.org/W2118329107","https://openalex.org/W2120000030","https://openalex.org/W2128719541","https://openalex.org/W2128876494","https://openalex.org/W2537959404","https://openalex.org/W2759778047","https://openalex.org/W3103339143","https://openalex.org/W6729272248"],"related_works":["https://openalex.org/W2356602486","https://openalex.org/W2351992668","https://openalex.org/W2324828474","https://openalex.org/W2374315191","https://openalex.org/W2391207559","https://openalex.org/W2384715785","https://openalex.org/W2349624418","https://openalex.org/W4252501555","https://openalex.org/W2003848320","https://openalex.org/W1987014004"],"abstract_inverted_index":{"High":[0],"performance":[1],"systems":[2],"often":[3],"employ":[4],"multi-ported":[5],"memories":[6],"to":[7],"enhance":[8],"the":[9,14,23,52,82],"throughput":[10],"and":[11,26,69,81,98,103],"flexibility":[12],"of":[13,41,66,89],"memory.":[15],"Existing":[16],"SRAM":[17,24,83],"compilers":[18],"offer":[19],"limited":[20],"control":[21],"over":[22],"design":[25,39,106],"port":[27,79],"configurations":[28],"while":[29],"SRAMs":[30],"are":[31],"commonly":[32],"dual-ported.":[33],"Experimental":[34],"designs":[35],"could":[36],"benefit":[37],"from":[38],"exploration":[40],"multi-port":[42,48,96],"configurations.":[43],"We":[44],"propose":[45],"an":[46],"open-source,":[47],"solution":[49],"that":[50],"extends":[51],"OpenRAM":[53],"memory":[54],"compiler.":[55],"A":[56],"parameterized":[57],"bitcell":[58,73],"is":[59,75],"presented":[60],"which":[61],"can":[62,85],"support":[63,86,94],"any":[64,87],"combination":[65,88],"read,":[67],"write,":[68],"read-write":[70],"ports.":[71,91],"The":[72],"layout":[74,84],"generated":[76],"for":[77,95],"these":[78],"combinations,":[80],"two":[90],"In":[92],"addition,":[93],"characterization":[97],"functional":[99],"testing":[100],"ensures":[101],"correctness":[102],"incorporation":[104],"into":[105],"methodologies.":[107]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}