{"id":"https://openalex.org/W2918730494","doi":"https://doi.org/10.1109/vlsi-soc.2018.8644879","title":"A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion","display_name":"A Synthesizable Digital Low-Dropout Regulator Based on Voltage-to-Time Conversion","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2918730494","doi":"https://doi.org/10.1109/vlsi-soc.2018.8644879","mag":"2918730494"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2018.8644879","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2018.8644879","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018791712","display_name":"Naoki Ojima","orcid":null},"institutions":[{"id":"https://openalex.org/I14396692","display_name":"Tokyo University of Information Sciences","ror":"https://ror.org/044bdx604","country_code":"JP","type":"education","lineage":["https://openalex.org/I14396692"]},{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Naoki Ojima","raw_affiliation_strings":["Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan","institution_ids":["https://openalex.org/I14396692","https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071803491","display_name":"Toru Nakura","orcid":"https://orcid.org/0000-0001-5945-3918"},"institutions":[{"id":"https://openalex.org/I31784960","display_name":"Fukuoka University","ror":"https://ror.org/04nt8b154","country_code":"JP","type":"education","lineage":["https://openalex.org/I31784960"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toru Nakura","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, Fukuoka University, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, Fukuoka University, Japan","institution_ids":["https://openalex.org/I31784960"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007028121","display_name":"Tetsuya Iizuka","orcid":"https://orcid.org/0000-0002-1512-4714"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tetsuya Iizuka","raw_affiliation_strings":["VLSI Design and Education Center, The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center, The University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028680447","display_name":"Kunihiro Asada","orcid":"https://orcid.org/0000-0002-1150-0241"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kunihiro Asada","raw_affiliation_strings":["VLSI Design and Education Center, The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center, The University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5575,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.66308545,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"55","last_page":"58"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-dropout-regulator","display_name":"Low-dropout regulator","score":0.6815140247344971},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6438789963722229},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.6419374346733093},{"id":"https://openalex.org/keywords/transient-response","display_name":"Transient response","score":0.5704556703567505},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5176194906234741},{"id":"https://openalex.org/keywords/voltage-reference","display_name":"Voltage reference","score":0.4743833839893341},{"id":"https://openalex.org/keywords/voltage-regulator","display_name":"Voltage regulator","score":0.4727303087711334},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.44323962926864624},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.4431687593460083},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4388399124145508},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.4375036060810089},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.4280683398246765},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4185439646244049},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4118085503578186},{"id":"https://openalex.org/keywords/dropout-voltage","display_name":"Dropout voltage","score":0.36939042806625366},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30221590399742126}],"concepts":[{"id":"https://openalex.org/C140501009","wikidata":"https://www.wikidata.org/wiki/Q6692746","display_name":"Low-dropout regulator","level":5,"score":0.6815140247344971},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6438789963722229},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.6419374346733093},{"id":"https://openalex.org/C85761212","wikidata":"https://www.wikidata.org/wiki/Q1974593","display_name":"Transient response","level":2,"score":0.5704556703567505},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5176194906234741},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.4743833839893341},{"id":"https://openalex.org/C110706871","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Voltage regulator","level":3,"score":0.4727303087711334},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.44323962926864624},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.4431687593460083},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4388399124145508},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.4375036060810089},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.4280683398246765},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4185439646244049},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4118085503578186},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.36939042806625366},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30221590399742126},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2018.8644879","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2018.8644879","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8100000023841858,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322832","display_name":"University of Tokyo","ror":"https://ror.org/057zh3y96"},{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2038923613","https://openalex.org/W2086284897","https://openalex.org/W2167017502","https://openalex.org/W2344336685","https://openalex.org/W2770079565","https://openalex.org/W6660153168"],"related_works":["https://openalex.org/W1982997428","https://openalex.org/W2044172536","https://openalex.org/W2371498377","https://openalex.org/W2370995213","https://openalex.org/W3185987145","https://openalex.org/W4366165321","https://openalex.org/W3081405802","https://openalex.org/W2085302483","https://openalex.org/W2007310580","https://openalex.org/W2530387006"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,46,52],"synthesizable":[4],"digital":[5,12],"LDO":[6,56,74,136],"that":[7,49,95],"is":[8,29,42,75,112,127,138],"implemented":[9],"with":[10,83,96],"standard-cell-based":[11],"design":[13],"flow.":[14],"With":[15],"inverter":[16],"chains":[17],"as":[18,139,141],"voltage-controlled":[19],"delay":[20,32],"lines,":[21],"the":[22,39,54,72,101,109,116,124,135],"difference":[23,41],"between":[24],"output":[25],"and":[26,115],"reference":[27,110],"voltages":[28],"converted":[30],"into":[31],"difference,":[33],"then":[34],"compared":[35],"in":[36,77],"time-domain.":[37],"Since":[38],"time-domain":[40],"straightforwardly":[43],"captured":[44],"by":[45,134],"phase":[47],"detector":[48],"consists":[50],"of":[51,71,108,123],"D-FF,":[53],"proposed":[55,73],"does":[57],"not":[58],"need":[59],"an":[60],"analog":[61],"voltage":[62,111],"comparator,":[63],"which":[64,149],"requires":[65],"careful":[66],"manual":[67],"design.":[68],"The":[69,91,130],"prototype":[70],"fabricated":[76],"65":[78],"nm":[79],"standard":[80],"CMOS":[81],"technology":[82],"0.015":[84],"mm":[85],"<sup":[86],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[87],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[88],"area":[89],"occupation.":[90],"measurement":[92],"results":[93],"show":[94],"10.4":[97],"MHz":[98],"internal":[99],"clock":[100],"tracking":[102],"response":[103,118],"to":[104,119,151],"200":[105],"mV":[106],"switching":[107],"~4.5":[113],"\u03bcs":[114],"transient":[117],"5":[120],"mA":[121,146],"change":[122],"load":[125,147],"current":[126,132,154],"~6.6":[128],"\u03bcs.":[129],"quiescent":[131],"consumed":[133],"core":[137],"low":[140],"35.2":[142],"\u03bcA":[143],"at":[144],"10":[145],"current,":[148],"leads":[150],"99.6":[152],"%":[153],"efficiency.":[155]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
