{"id":"https://openalex.org/W2919961186","doi":"https://doi.org/10.1109/vlsi-soc.2018.8644737","title":"Design of Latch based Configurable Ring Oscillator PUF Targeting Secure FPGA","display_name":"Design of Latch based Configurable Ring Oscillator PUF Targeting Secure FPGA","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2919961186","doi":"https://doi.org/10.1109/vlsi-soc.2018.8644737","mag":"2919961186"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2018.8644737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2018.8644737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017945178","display_name":"Mahabub Hasan Mahalat","orcid":"https://orcid.org/0000-0003-3047-236X"},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Mahabub Hasan Mahalat","raw_affiliation_strings":["Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013692540","display_name":"Nikhil Ugale","orcid":null},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nikhil Ugale","raw_affiliation_strings":["Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023666402","display_name":"Rohit Shahare","orcid":null},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rohit Shahare","raw_affiliation_strings":["Department of Electronics & Communication Engineering, National Institute of Technology Durgapur, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, National Institute of Technology Durgapur, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044215390","display_name":"Bibhash Sen","orcid":"https://orcid.org/0000-0003-4803-3074"},"institutions":[{"id":"https://openalex.org/I155837530","display_name":"National Institute of Technology Durgapur","ror":"https://ror.org/04ds0jm32","country_code":"IN","type":"education","lineage":["https://openalex.org/I155837530"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bibhash Sen","raw_affiliation_strings":["Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Engineering, National Institute of Technology Durgapur, Durgapur, India","institution_ids":["https://openalex.org/I155837530"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5017945178"],"corresponding_institution_ids":["https://openalex.org/I155837530"],"apc_list":null,"apc_paid":null,"fwci":0.5049,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65534099,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"261","last_page":"266"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9861000180244446,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8043098449707031},{"id":"https://openalex.org/keywords/physical-unclonable-function","display_name":"Physical unclonable function","score":0.7777155637741089},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.6905030012130737},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6346461772918701},{"id":"https://openalex.org/keywords/ring-oscillator","display_name":"Ring oscillator","score":0.6309045553207397},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.587138831615448},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.54118812084198},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.501237154006958},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.47371190786361694},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.4528253674507141},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44011086225509644},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4128715693950653},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35840725898742676},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.31506919860839844},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19822841882705688},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16493690013885498},{"id":"https://openalex.org/keywords/arbiter","display_name":"Arbiter","score":0.09116074442863464},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0794207751750946}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8043098449707031},{"id":"https://openalex.org/C8643368","wikidata":"https://www.wikidata.org/wiki/Q4046262","display_name":"Physical unclonable function","level":3,"score":0.7777155637741089},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.6905030012130737},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6346461772918701},{"id":"https://openalex.org/C104111718","wikidata":"https://www.wikidata.org/wiki/Q2153973","display_name":"Ring oscillator","level":3,"score":0.6309045553207397},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.587138831615448},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.54118812084198},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.501237154006958},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.47371190786361694},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.4528253674507141},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44011086225509644},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4128715693950653},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35840725898742676},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.31506919860839844},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19822841882705688},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16493690013885498},{"id":"https://openalex.org/C2779971761","wikidata":"https://www.wikidata.org/wiki/Q629872","display_name":"Arbiter","level":2,"score":0.09116074442863464},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0794207751750946},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2018.8644737","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2018.8644737","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5,"display_name":"Life in Land","id":"https://metadata.un.org/sdg/15"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W132856916","https://openalex.org/W156132949","https://openalex.org/W1541663547","https://openalex.org/W1551669226","https://openalex.org/W2038244154","https://openalex.org/W2073264789","https://openalex.org/W2104401100","https://openalex.org/W2114337476","https://openalex.org/W2116374153","https://openalex.org/W2126279347","https://openalex.org/W2128735154","https://openalex.org/W2129004891","https://openalex.org/W2130351941","https://openalex.org/W2135064681","https://openalex.org/W2145858709","https://openalex.org/W2164595519","https://openalex.org/W2168174386","https://openalex.org/W2509061923","https://openalex.org/W2758731284","https://openalex.org/W4241054193","https://openalex.org/W6632480037","https://openalex.org/W6679027519"],"related_works":["https://openalex.org/W2093731983","https://openalex.org/W4389544506","https://openalex.org/W2128735154","https://openalex.org/W2333684670","https://openalex.org/W4391377915","https://openalex.org/W2525030438","https://openalex.org/W2126460857","https://openalex.org/W1504430383","https://openalex.org/W2135064681","https://openalex.org/W2373258662"],"abstract_inverted_index":{"Physically":[0],"unclonable":[1],"function":[2],"(PUF)":[3],"is":[4,39,52,68],"one":[5],"of":[6,19,90,98,108,117,143],"the":[7,14,20,40,76,111,130,141,148,154,168,171,184],"most":[8],"advocated":[9,69],"security":[10,172],"primitives":[11],"which":[12,86,164],"extracts":[13],"uncontrollable":[15],"intrinsic":[16],"physical":[17],"property":[18],"fabrication":[21],"process":[22],"to":[23,45,56,70,92,113,139,156],"generate":[24],"secret":[25],"bits":[26],"for":[27],"authentication,":[28],"random":[29],"number":[30,116,142],"generation":[31],"and":[32,61,170],"key":[33],"generation.":[34],"Ring":[35],"oscillator":[36],"(RO)":[37],"PUF":[38,43,67],"widely":[41],"adopted":[42],"design":[44,127,186],"implement":[46],"in":[47,103,106,121,133,160,165],"FPGA":[48,181],"platform,":[49],"but":[50],"it":[51,152],"highly":[53],"error":[54,197],"prone":[55],"environmental":[57,192],"noise":[58],"(i.e.":[59,101],"temperature":[60],"voltage).":[62],"The":[63,96,125],"configurable":[64,135],"RO":[65,123,144,162],"(CRO)":[66],"resolve":[71],"this":[72],"issue":[73],"without":[74,194],"increasing":[75],"area":[77],"overhead.":[78],"This":[79],"paper":[80],"proposes":[81],"an":[82,94,104,122,161],"enhanced":[83],"CRO":[84],"framework":[85],"uses":[87],"latch":[88,100,159],"instead":[89],"inverter":[91,109],"build":[93],"RO.":[95],"use":[97,114],"dedicated":[99],"available":[102],"FPGA)":[105],"place":[107],"eliminates":[110],"restriction":[112],"odd":[115],"delay":[118],"units":[119],"(inverters)":[120],"configuration.":[124],"proposed":[126,185],"efficiently":[128],"utilizes":[129],"resources":[131],"found":[132],"a":[134,158],"logic":[136],"block":[137],"(CLB)":[138],"increase":[140],"configurations":[145],"while":[146],"using":[147,195],"same":[149],"area.":[150],"Also,":[151],"provides":[153],"flexibility":[155],"include":[157],"configuration":[163],"turns":[166],"improve":[167],"reliability":[169],"as":[173],"well.":[174],"Experimental":[175],"results":[176],"on":[177],"Xilinx":[178],"Spartan":[179],"3E":[180],"establish":[182],"that":[183],"exhibits":[187],"high":[188],"stability":[189],"despite":[190],"varying":[191],"conditions":[193],"any":[196],"correcting":[198],"code":[199],"or":[200],"post-processing":[201],"technique.":[202]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
