{"id":"https://openalex.org/W2537117864","doi":"https://doi.org/10.1109/vlsi-soc.2014.7004163","title":"A low power 720p motion estimation processor with 3D stacked memory","display_name":"A low power 720p motion estimation processor with 3D stacked memory","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W2537117864","doi":"https://doi.org/10.1109/vlsi-soc.2014.7004163","mag":"2537117864"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2014.7004163","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2014.7004163","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100325626","display_name":"Shuping Zhang","orcid":"https://orcid.org/0000-0002-2501-9715"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shuping Zhang","raw_affiliation_strings":["Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021863826","display_name":"Jinjia Zhou","orcid":"https://orcid.org/0000-0002-5078-0522"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Jinjia Zhou","raw_affiliation_strings":["Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101547152","display_name":"Dajiang Zhou","orcid":"https://orcid.org/0000-0003-2500-8466"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Dajiang Zhou","raw_affiliation_strings":["Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101825973","display_name":"Satoshi Goto","orcid":"https://orcid.org/0000-0002-6387-048X"},"institutions":[{"id":"https://openalex.org/I150744194","display_name":"Waseda University","ror":"https://ror.org/00ntfnx83","country_code":"JP","type":"education","lineage":["https://openalex.org/I150744194"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Satoshi Goto","raw_affiliation_strings":["Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Graduate School of Information, Production and Systems, Waseda University 2\u20137, Hibikino, Kitakyushu, Japan","institution_ids":["https://openalex.org/I150744194"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I150744194"],"apc_list":null,"apc_paid":null,"fwci":0.4969,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62056049,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"4","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9936000108718872,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.715514063835144},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6335504055023193},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.519037127494812},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.482033371925354},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4804762899875641},{"id":"https://openalex.org/keywords/memory-architecture","display_name":"Memory architecture","score":0.44530928134918213},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43441373109817505},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.42638248205184937},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35105252265930176},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.33463552594184875},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14374396204948425}],"concepts":[{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.715514063835144},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6335504055023193},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.519037127494812},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.482033371925354},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4804762899875641},{"id":"https://openalex.org/C2779602883","wikidata":"https://www.wikidata.org/wiki/Q15544750","display_name":"Memory architecture","level":2,"score":0.44530928134918213},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43441373109817505},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.42638248205184937},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35105252265930176},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.33463552594184875},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14374396204948425},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2014.7004163","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2014.7004163","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.800000011920929,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1569235285","https://openalex.org/W1974002530","https://openalex.org/W1981220134","https://openalex.org/W2027712195","https://openalex.org/W2054461765","https://openalex.org/W2100516830","https://openalex.org/W2107304970","https://openalex.org/W2117549343","https://openalex.org/W2118711096","https://openalex.org/W2120864058","https://openalex.org/W2155640917","https://openalex.org/W4253370289","https://openalex.org/W6633910448","https://openalex.org/W6659544943"],"related_works":["https://openalex.org/W2770465587","https://openalex.org/W2086716781","https://openalex.org/W2154560316","https://openalex.org/W2022510519","https://openalex.org/W2543610639","https://openalex.org/W2077105843","https://openalex.org/W2001585562","https://openalex.org/W2128337014","https://openalex.org/W2993780376","https://openalex.org/W2105031241"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,29,66],"motion":[4],"estimation":[5],"processor":[6],"(MEP)":[7],"with":[8,36,107,164],"3D":[9,62,87],"stacked":[10],"memory":[11,19,30,68,81,129],"architecture":[12],"is":[13,32,70,90,115,135,150,169],"proposed":[14,61],"to":[15,58,72],"1)":[16],"reduce":[17],"the":[18,60,74,78,93,110,121,125,131,147,174],"and":[20,34,44,77,83,128,139,154],"core":[21],"power":[22,102],"consumption;":[23],"2)":[24],"provide":[25],"higher":[26],"bandwidth.":[27],"Firstly,":[28],"die":[31,82,127],"designed":[33],"staked":[35],"MEP":[37,84,126],"die.":[38,85],"By":[39],"adding":[40],"face-to-face":[41],"(F2F)":[42],"pad":[43],"through":[45],"silicon":[46],"vias":[47],"(TSV)":[48],"definitions,":[49],"2D":[50,108],"electronic":[51],"design":[52,89,156],"automation":[53],"(EDA)":[54],"tools":[55],"are":[56],"extended":[57],"support":[59,158],"stacking":[63],"architecture.":[64],"Moreover,":[65],"novel":[67],"controller":[69],"applied":[71],"control":[73],"data":[75],"transmission":[76],"timing":[79],"between":[80],"Finally,":[86],"physical":[88],"completed":[91],"for":[92],"whole":[94,155],"system":[95],"including":[96],"TSV/F2F":[97],"placement,":[98],"floor":[99,122],"plan":[100,123],"optimization,":[101],"network":[103],"generation,":[104],"etc.":[105],"Comparing":[106],"technology,":[109],"number":[111],"of":[112,124,173],"IO":[113],"pins":[114],"reduced":[116,136],"by":[117,137],"77%.":[118],"After":[119],"optimizing":[120],"die,":[130],"routing":[132],"wire":[133],"length":[134],"13.4%":[138],"50%":[140],"respectively.":[141],"The":[142],"simulation":[143],"results":[144],"show":[145],"that":[146],"max":[148],"bandwidth":[149],"more":[151],"than":[152,166],"14GB/s":[153],"can":[157],"real-time":[159],"720p@60fps":[160],"encoding":[161],"at":[162],"8MHz":[163],"less":[165],"65mW,":[167],"which":[168],"only":[170],"one":[171],"sixth":[172],"state-of-the-art":[175],"MEP.":[176]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
