{"id":"https://openalex.org/W1999554598","doi":"https://doi.org/10.1109/vlsi-soc.2013.6673280","title":"Static energy minimization of 3D stacked L2 cache with selective cache compression","display_name":"Static energy minimization of 3D stacked L2 cache with selective cache compression","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1999554598","doi":"https://doi.org/10.1109/vlsi-soc.2013.6673280","mag":"1999554598"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2013.6673280","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2013.6673280","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070439640","display_name":"Jongbum Park","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Jongbum Park","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026021564","display_name":"Jongpil Jung","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jongpil Jung","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033886915","display_name":"Yi Kang","orcid":"https://orcid.org/0009-0004-3092-5626"},"institutions":[{"id":"https://openalex.org/I113825674","display_name":"Handong Global University","ror":"https://ror.org/00txhkt32","country_code":"KR","type":"education","lineage":["https://openalex.org/I113825674"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kang Yi","raw_affiliation_strings":["School of Computer Science and EE, Handong Global University, Pohang, Republic of Korea","Sch. of Comput. Sci. & EE, Handong Global Univ., Pohang, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and EE, Handong Global University, Pohang, Republic of Korea","institution_ids":["https://openalex.org/I113825674"]},{"raw_affiliation_string":"Sch. of Comput. Sci. & EE, Handong Global Univ., Pohang, South Korea","institution_ids":["https://openalex.org/I113825674"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101611981","display_name":"Chong\u2010Min Kyung","orcid":"https://orcid.org/0000-0002-3959-9714"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Chong-Min Kyung","raw_affiliation_strings":["Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, KAIST, Daejeon, Republic of Korea","institution_ids":["https://openalex.org/I157485424"]},{"raw_affiliation_string":"Dept. of Electr. Eng., KAIST\\\\, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5070439640"],"corresponding_institution_ids":["https://openalex.org/I157485424"],"apc_list":null,"apc_paid":null,"fwci":0.6304,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.68377823,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"14","issue":null,"first_page":"228","last_page":"233"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8423072099685669},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.7767674922943115},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.7490332126617432},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.7184624671936035},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7147766351699829},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.709145188331604},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.6612337827682495},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.623709499835968},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5355666875839233},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.5205746293067932},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5141849517822266},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44243180751800537},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43733835220336914},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.216237872838974},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07640117406845093},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.06394460797309875}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8423072099685669},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.7767674922943115},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.7490332126617432},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.7184624671936035},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7147766351699829},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.709145188331604},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.6612337827682495},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.623709499835968},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5355666875839233},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.5205746293067932},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5141849517822266},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44243180751800537},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43733835220336914},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.216237872838974},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07640117406845093},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.06394460797309875}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2013.6673280","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2013.6673280","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1972703906","https://openalex.org/W1976494130","https://openalex.org/W2021388492","https://openalex.org/W2042261286","https://openalex.org/W2061587924","https://openalex.org/W2071208935","https://openalex.org/W2071522743","https://openalex.org/W2085681011","https://openalex.org/W2092677096","https://openalex.org/W2108117840","https://openalex.org/W2123917655","https://openalex.org/W2126357937","https://openalex.org/W2129960401","https://openalex.org/W2130252115","https://openalex.org/W2131413854","https://openalex.org/W2133044942","https://openalex.org/W2141923369","https://openalex.org/W2142322859","https://openalex.org/W2143807959","https://openalex.org/W2159217072","https://openalex.org/W2159697788","https://openalex.org/W3139689176","https://openalex.org/W3140078554","https://openalex.org/W4234059337","https://openalex.org/W4235106764","https://openalex.org/W4235218387","https://openalex.org/W4244398661","https://openalex.org/W6661095843","https://openalex.org/W6673359156","https://openalex.org/W6675903345"],"related_works":["https://openalex.org/W2133489088","https://openalex.org/W2363769136","https://openalex.org/W2114386333","https://openalex.org/W2126408955","https://openalex.org/W2734782074","https://openalex.org/W2539712666","https://openalex.org/W2148571123","https://openalex.org/W2396934146","https://openalex.org/W2369103246","https://openalex.org/W2118932116"],"abstract_inverted_index":{"Three-dimentional":[0],"(3D)":[1],"integration":[2,38],"is":[3,59,115],"one":[4],"of":[5,55,64,91],"the":[6,17,22,87,106,112,140],"most":[7],"promising":[8],"approaches":[9],"to":[10,15,36,46,85,99,105,129],"increase":[11],"cache":[12,57,66,78,107,142],"bandwidth":[13],"and":[14,20,24],"reduce":[16,86],"wire":[18],"length":[19],"thereby,":[21],"delay":[23],"transmission":[25],"power":[26,30,83],"consumption.":[27,50],"However,":[28],"high":[29,47],"density":[31],"in":[32,68,102],"3D":[33],"IC":[34],"due":[35],"dense":[37],"incurs":[39],"significant":[40],"leakage":[41,52],"current":[42],"increment":[43],"which":[44],"leads":[45],"static":[48,88],"energy":[49,53,89,125],"The":[51,117],"consumption":[54,90,126],"3D-stacked":[56,92],"memory":[58,67],"more":[60],"serious":[61],"than":[62],"that":[63,111,121],"conventional":[65,141],"2D":[69],"ICs.":[70],"In":[71],"this":[72],"paper,":[73],"we":[74],"propose":[75],"a":[76],"selective":[77],"compression":[79],"technique":[80],"coupled":[81],"with":[82,134,139],"gating":[84],"SRAM":[93],"cache.":[94],"Cache":[95],"blocks":[96],"are":[97],"selected":[98],"be":[100],"compressed":[101],"runtime":[103],"according":[104],"access":[108],"pattern,":[109],"so":[110],"decompression":[113],"overhead":[114,137],"reduced.":[116],"experimental":[118],"results":[119],"show":[120],"our":[122],"method":[123],"reduces":[124],"by":[127],"up":[128],"40%":[130],"(22%":[131],"on":[132],"average)":[133],"negligible":[135],"performance":[136],"compared":[138],"management":[143],"policy.":[144]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
