{"id":"https://openalex.org/W3144153434","doi":"https://doi.org/10.1109/vlsi-soc.2012.6379010","title":"Mapping of image and network processing tasks on high-throughput CMOL FPGA circuits","display_name":"Mapping of image and network processing tasks on high-throughput CMOL FPGA circuits","publication_year":2012,"publication_date":"2012-10-01","ids":{"openalex":"https://openalex.org/W3144153434","doi":"https://doi.org/10.1109/vlsi-soc.2012.6379010","mag":"3144153434"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-soc.2012.6379010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2012.6379010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038802680","display_name":"Advait Madhavan","orcid":"https://orcid.org/0000-0002-4121-1336"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Advait Madhavan","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5035468831","display_name":"Dmitri B. Strukov","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Dmitri B. Strukov","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5038802680"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2423,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.82637136,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"2","issue":null,"first_page":"82","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8020946979522705},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.7892793416976929},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7521717548370361},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.511926531791687},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.4774877727031708},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4500945210456848},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.4164593815803528},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.34556281566619873},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34166276454925537},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.17484202980995178},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0964842438697815},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09244802594184875}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8020946979522705},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.7892793416976929},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7521717548370361},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.511926531791687},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.4774877727031708},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4500945210456848},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.4164593815803528},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.34556281566619873},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34166276454925537},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.17484202980995178},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0964842438697815},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09244802594184875},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-soc.2012.6379010","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-soc.2012.6379010","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1571889683","https://openalex.org/W2025674646","https://openalex.org/W2031176269","https://openalex.org/W2069418413","https://openalex.org/W2089125699","https://openalex.org/W2111173832","https://openalex.org/W2113537458","https://openalex.org/W2118656010","https://openalex.org/W2120742511","https://openalex.org/W2124594023","https://openalex.org/W2128181612","https://openalex.org/W2136288682","https://openalex.org/W2137249916","https://openalex.org/W2139580250","https://openalex.org/W2146642170","https://openalex.org/W2147004330","https://openalex.org/W2148264254","https://openalex.org/W2148459029","https://openalex.org/W2151339883","https://openalex.org/W2152435892","https://openalex.org/W2158156973","https://openalex.org/W2162080541","https://openalex.org/W2170095368","https://openalex.org/W3144153434","https://openalex.org/W3146800804","https://openalex.org/W4233477625","https://openalex.org/W6608081938"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2082487009","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":null,"counts_by_year":[{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
