{"id":"https://openalex.org/W4229442478","doi":"https://doi.org/10.1109/vlsi-dat54769.2022.9768049","title":"Robust CNFET Circuit Sizing Optimization","display_name":"Robust CNFET Circuit Sizing Optimization","publication_year":2022,"publication_date":"2022-04-18","ids":{"openalex":"https://openalex.org/W4229442478","doi":"https://doi.org/10.1109/vlsi-dat54769.2022.9768049"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat54769.2022.9768049","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat54769.2022.9768049","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090991349","display_name":"Zahra Heshmatpour","orcid":null},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Zahra Heshmatpour","raw_affiliation_strings":["Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada","institution_ids":["https://openalex.org/I130438778"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100705837","display_name":"Lihong Zhang","orcid":"https://orcid.org/0000-0003-2946-8072"},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Lihong Zhang","raw_affiliation_strings":["Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada","institution_ids":["https://openalex.org/I130438778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044553493","display_name":"Howard M. Heys","orcid":"https://orcid.org/0000-0003-4506-3673"},"institutions":[{"id":"https://openalex.org/I130438778","display_name":"Memorial University of Newfoundland","ror":"https://ror.org/04haebc03","country_code":"CA","type":"education","lineage":["https://openalex.org/I130438778"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Howard M. Heys","raw_affiliation_strings":["Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Memorial University of Newfoundland,Department of Electrical Engineering,St.john's,Canada","institution_ids":["https://openalex.org/I130438778"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1847,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.4652717,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6743125319480896},{"id":"https://openalex.org/keywords/carbon-nanotube-field-effect-transistor","display_name":"Carbon nanotube field-effect transistor","score":0.65687495470047},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.614581286907196},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6127625703811646},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5672395825386047},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5010979175567627},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4941752254962921},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.45910313725471497},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4474114775657654},{"id":"https://openalex.org/keywords/field-effect-transistor","display_name":"Field-effect transistor","score":0.36047500371932983},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.25391650199890137},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2101503312587738},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.20150691270828247},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1594536304473877}],"concepts":[{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6743125319480896},{"id":"https://openalex.org/C58916441","wikidata":"https://www.wikidata.org/wiki/Q1778563","display_name":"Carbon nanotube field-effect transistor","level":5,"score":0.65687495470047},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.614581286907196},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6127625703811646},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5672395825386047},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5010979175567627},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4941752254962921},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.45910313725471497},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4474114775657654},{"id":"https://openalex.org/C145598152","wikidata":"https://www.wikidata.org/wiki/Q176097","display_name":"Field-effect transistor","level":4,"score":0.36047500371932983},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.25391650199890137},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2101503312587738},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.20150691270828247},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1594536304473877},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat54769.2022.9768049","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat54769.2022.9768049","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320319952","display_name":"Canada Foundation for Innovation","ror":"https://ror.org/000az4664"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W22126472","https://openalex.org/W1556064588","https://openalex.org/W1597174553","https://openalex.org/W2018790177","https://openalex.org/W2056648604","https://openalex.org/W2246439441","https://openalex.org/W2555866191","https://openalex.org/W2899985657","https://openalex.org/W2922477389","https://openalex.org/W2955294072","https://openalex.org/W3010986276","https://openalex.org/W3089997764","https://openalex.org/W3161959653","https://openalex.org/W4237153210","https://openalex.org/W4251855355","https://openalex.org/W6600849004","https://openalex.org/W6679472356"],"related_works":["https://openalex.org/W3150791155","https://openalex.org/W2570275273","https://openalex.org/W2317479535","https://openalex.org/W1579695216","https://openalex.org/W1976161475","https://openalex.org/W3124581103","https://openalex.org/W1976780206","https://openalex.org/W2146902916","https://openalex.org/W1481622942","https://openalex.org/W2040623373"],"abstract_inverted_index":{"Carbon":[0],"nanotube":[1],"field-effect":[2],"transistors":[3,11],"(CNFETs)":[4],"are":[5],"a":[6,42,75],"promising":[7],"alternative":[8],"to":[9,13,23,33,84,104],"CMOS":[10,17],"due":[12],"the":[14,105],"limitation":[15],"of":[16,54,58],"toward":[18],"technology":[19],"scale-down.":[20],"In":[21,37],"addition":[22],"high":[24],"intrinsic":[25],"gain,":[26],"CNFETs":[27],"can":[28],"better":[29],"control":[30],"current":[31],"thanks":[32],"their":[34],"unique":[35],"properties.":[36],"this":[38],"paper,":[39],"we":[40,82],"propose":[41],"generic":[43],"design":[44,86],"centering":[45],"sizing":[46,62,108],"optimization":[47],"method":[48,63],"for":[49,90],"CNFET":[50,91,107],"analog":[51,92],"circuits.":[52],"Because":[53],"CNFET's":[55],"low":[56],"tolerance":[57],"parameter":[59],"variation,":[60],"our":[61,98],"systematically":[64],"considers":[65],"typical":[66],"process":[67],"variation":[68],"in":[69],"common":[70],"fabrication":[71],"practice.":[72],"By":[73],"using":[74],"modified":[76],"generalized":[77],"boundary":[78],"curve":[79],"(GBC)":[80],"method,":[81],"strive":[83],"boost":[85],"robustness":[87],"and":[88],"reliability":[89],"design.":[93],"The":[94],"experimental":[95],"results":[96],"exhibit":[97],"proposed":[99],"method's":[100],"strong":[101],"efficacy":[102],"compared":[103],"previous":[106],"work.":[109]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}