{"id":"https://openalex.org/W2805895021","doi":"https://doi.org/10.1109/vlsi-dat.2018.8373247","title":"Double asymmetric-latency storage class memories (SCMs) for fast-write SCM, fast-read SCM &amp; NAND flash hybrid SSDs","display_name":"Double asymmetric-latency storage class memories (SCMs) for fast-write SCM, fast-read SCM &amp; NAND flash hybrid SSDs","publication_year":2018,"publication_date":"2018-04-01","ids":{"openalex":"https://openalex.org/W2805895021","doi":"https://doi.org/10.1109/vlsi-dat.2018.8373247","mag":"2805895021"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2018.8373247","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2018.8373247","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028558019","display_name":"Yutaka Adachi","orcid":null},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yutaka Adachi","raw_affiliation_strings":["Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085429599","display_name":"Chihiro Matsui","orcid":"https://orcid.org/0000-0003-4594-6839"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Chihiro Matsui","raw_affiliation_strings":["Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032914719","display_name":"Ken Takeuchi","orcid":"https://orcid.org/0000-0002-9345-6503"},"institutions":[{"id":"https://openalex.org/I96679780","display_name":"Chuo University","ror":"https://ror.org/03qvqb743","country_code":"JP","type":"education","lineage":["https://openalex.org/I96679780"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Ken Takeuchi","raw_affiliation_strings":["Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical, Electronic and Communication Engineering, Chuo University, Tokyo, Japan","institution_ids":["https://openalex.org/I96679780"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5028558019"],"corresponding_institution_ids":["https://openalex.org/I96679780"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.0641595,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.96670001745224,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.8460982441902161},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8059107065200806},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.7479878664016724},{"id":"https://openalex.org/keywords/flash","display_name":"Flash (photography)","score":0.5762494802474976},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4803272783756256},{"id":"https://openalex.org/keywords/low-latency","display_name":"Low latency (capital markets)","score":0.45327436923980713},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43683600425720215},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.18637585639953613},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.146526038646698},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.07245686650276184}],"concepts":[{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.8460982441902161},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8059107065200806},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.7479878664016724},{"id":"https://openalex.org/C2777526259","wikidata":"https://www.wikidata.org/wiki/Q221836","display_name":"Flash (photography)","level":2,"score":0.5762494802474976},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4803272783756256},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.45327436923980713},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43683600425720215},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.18637585639953613},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.146526038646698},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.07245686650276184},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2018.8373247","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2018.8373247","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5799999833106995}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2010795939","https://openalex.org/W2034593071","https://openalex.org/W2047335164","https://openalex.org/W2221855158","https://openalex.org/W2527425943","https://openalex.org/W2762009377"],"related_works":["https://openalex.org/W2054139911","https://openalex.org/W1577524679","https://openalex.org/W2386432552","https://openalex.org/W4230869547","https://openalex.org/W2355887979","https://openalex.org/W4285309357","https://openalex.org/W2489439822","https://openalex.org/W4237143391","https://openalex.org/W2350469736","https://openalex.org/W3205411230"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"heterogeneously-integrated":[3],"double":[4],"asymmetric-latency":[5],"storage":[6],"class":[7],"memories":[8],"(SCMs)":[9],"for":[10,66],"SCM/NAND":[11,57],"flash":[12,46,58],"hybrid":[13,47,59],"SSDs.":[14],"Fast-Write":[15],"SCM":[16,24],"(W-SCM)":[17],"achieves":[18],"the":[19,27,31,42,81,86,90,98],"fast":[20,28],"write,":[21],"while":[22],"Fast-Read":[23],"(R-SCM)":[25],"realizes":[26],"read.":[29],"By":[30,84],"mix":[32],"&":[33],"match":[34],"of":[35,44,71,95,109],"two":[36],"SCMs":[37,96],"with":[38,54],"asymmetric":[39],"write/read":[40],"latency,":[41],"performance":[43],"W-SCM/R-SCM/NAND":[45],"SSD":[48,82,99],"is":[49],"improved":[50],"by":[51,97],"86%":[52],"compared":[53],"a":[55],"conventional":[56],"S":[60],"SD.":[61],"The":[62],"data":[63],"management":[64],"techniques":[65],"effectively":[67],"controlling":[68],"three":[69],"types":[70],"memories,":[72],"W-SCM,":[73],"R-SCM":[74,103],"and":[75,89,102],"NAND":[76],"flash,":[77],"are":[78,104],"implemented":[79],"in":[80],"controller.":[83],"changing":[85,107],"ECC":[87],"strength":[88],"maximum":[91],"set/reset":[92],"verify":[93],"cycles":[94],"controller,":[100],"W-SCM":[101],"realized":[105],"without":[106],"circuits":[108],"SCMs.":[110]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
