{"id":"https://openalex.org/W2137293073","doi":"https://doi.org/10.1109/vlsi-dat.2014.6834878","title":"Efficient test length reduction techniques for interposer-based 2.5D ICs","display_name":"Efficient test length reduction techniques for interposer-based 2.5D ICs","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2137293073","doi":"https://doi.org/10.1109/vlsi-dat.2014.6834878","mag":"2137293073"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2014.6834878","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2014.6834878","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101941698","display_name":"Shyue-Kung Lu","orcid":"https://orcid.org/0000-0001-9232-2012"},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Shyue-Kung Lu","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]","institution_ids":["https://openalex.org/I154864474"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071719508","display_name":"Huai-Min Li","orcid":null},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Huai-Min Li","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]","institution_ids":["https://openalex.org/I154864474"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052190532","display_name":"Masaki Hashizume","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masaki Hashizume","raw_affiliation_strings":["Institute of Technology and Science, The University of Tokushima, Tokushima, Japan","Institute of technology and science, The university of Tokushima, Tokushima, Japan"],"affiliations":[{"raw_affiliation_string":"Institute of Technology and Science, The University of Tokushima, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]},{"raw_affiliation_string":"Institute of technology and science, The university of Tokushima, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059723979","display_name":"Jinhua Hong","orcid":"https://orcid.org/0000-0002-6406-1780"},"institutions":[{"id":"https://openalex.org/I192168892","display_name":"National University of Kaohsiung","ror":"https://ror.org/013zjb662","country_code":"TW","type":"education","lineage":["https://openalex.org/I192168892"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jin-Hua Hong","raw_affiliation_strings":["Department of Electrical Engineering, National Kaohsiung University"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Kaohsiung University","institution_ids":["https://openalex.org/I192168892"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080346286","display_name":"Zheng-Ru Tsai","orcid":null},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Zheng-Ru Tsai","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"[Department of Electrical Engineering, National-Taiwan University of Science and Technology, Taipei, Taiwan]","institution_ids":["https://openalex.org/I154864474"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101941698"],"corresponding_institution_ids":["https://openalex.org/I154864474"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.13900903,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.9102468490600586},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.7431809306144714},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6972392201423645},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6148539185523987},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6129632592201233},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.5982800722122192},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5147569179534912},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5081741809844971},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4510865807533264},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4270506501197815},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.36330270767211914},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.34651410579681396},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.32485610246658325},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2705950140953064},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.21660274267196655},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09270471334457397},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08162686228752136}],"concepts":[{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.9102468490600586},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.7431809306144714},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6972392201423645},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6148539185523987},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6129632592201233},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.5982800722122192},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5147569179534912},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5081741809844971},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4510865807533264},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4270506501197815},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.36330270767211914},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.34651410579681396},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.32485610246658325},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2705950140953064},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.21660274267196655},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09270471334457397},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08162686228752136},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2014.6834878","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2014.6834878","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2002645608","https://openalex.org/W2007244685","https://openalex.org/W2028504835","https://openalex.org/W2051668240","https://openalex.org/W2090396476","https://openalex.org/W2137893918","https://openalex.org/W2143502515","https://openalex.org/W2147115611","https://openalex.org/W2149593163","https://openalex.org/W4231486519","https://openalex.org/W4235430437"],"related_works":["https://openalex.org/W2037416628","https://openalex.org/W2073725000","https://openalex.org/W2789752821","https://openalex.org/W2205502757","https://openalex.org/W1480508001","https://openalex.org/W2235483886","https://openalex.org/W2097812662","https://openalex.org/W2887648165","https://openalex.org/W2528892790","https://openalex.org/W2117988687"],"abstract_inverted_index":{"Three-dimensional":[0],"integration":[1],"is":[2,24],"considered":[3],"a":[4,31,90,115,126],"promising":[5],"solution":[6],"to":[7,58,74,113,121,124],"cure":[8],"the":[9,26,36,52,60,66,77,81,135,143,155],"challenges":[10],"of":[11,21,44],"performance,":[12],"power":[13],"consumption,":[14],"quality,":[15],"and":[16,35,47,96,118],"reliability":[17],"issues.":[18],"The":[19,107],"feature":[20],"2.5D":[22,67],"ICs":[23,68],"that":[25,134],"dies":[27,37,112,123],"are":[28,102],"stacked":[29],"on":[30],"passive":[32],"silicon":[33,53,70],"interposer":[34],"communicate":[38],"with":[39,69],"each":[40],"other":[41,122],"by":[42],"means":[43],"TSV-based":[45],"interconnects":[46,79],"re-Distribution":[48],"layers":[49],"(RDL)":[50],"within":[51],"interposer.":[54,71],"This":[55],"paper":[56],"aims":[57],"investigate":[59],"efficient":[61],"post-bond":[62],"test":[63,156],"technique":[64],"for":[65,87,129,142],"In":[72],"order":[73],"efficiently":[75],"reuse":[76,94],"functional":[78],"as":[80],"parallel":[82],"TAM":[83,145],"(test":[84],"access":[85],"mechanism)":[86],"testing":[88],"dies,":[89],"novel":[91],"macro-die-based":[92],"interconnect":[93],"strategy":[95,109],"its":[97],"corresponding":[98],"design-for-test":[99],"(DFT)":[100],"architecture":[101],"proposed":[103,108,136],"in":[104],"this":[105],"paper.":[106],"merges":[110],"several":[111],"form":[114,125],"macro":[116],"die":[117],"then":[119,158],"connected":[120],"daisy":[127],"chain":[128],"testing.":[130],"Experimental":[131],"results":[132],"show":[133],"techniques":[137],"have":[138],"higher":[139],"success":[140],"rates":[141],"required":[144],"width":[146],"constraints.":[147],"Moreover,":[148],"since":[149],"we":[150],"can":[151,159],"get":[152],"wider":[153],"TAMs,":[154],"length":[157],"be":[160],"reduced":[161],"significantly.":[162]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
