{"id":"https://openalex.org/W2136745401","doi":"https://doi.org/10.1109/vlsi-dat.2014.6834866","title":"On efficient error-tolerability evaluation and maximization for image processing applications","display_name":"On efficient error-tolerability evaluation and maximization for image processing applications","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2136745401","doi":"https://doi.org/10.1109/vlsi-dat.2014.6834866","mag":"2136745401"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2014.6834866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2014.6834866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028476747","display_name":"Tong-Yu Hsieh","orcid":"https://orcid.org/0000-0002-7954-5569"},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Tong-Yu Hsieh","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004452505","display_name":"Kuan-Hsien Li","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuan-Hsien Li","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057668014","display_name":"Yi-Han Peng","orcid":null},"institutions":[{"id":"https://openalex.org/I142974352","display_name":"National Sun Yat-sen University","ror":"https://ror.org/00mjawt10","country_code":"TW","type":"education","lineage":["https://openalex.org/I142974352"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Han Peng","raw_affiliation_strings":["Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan","institution_ids":["https://openalex.org/I142974352"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Sun Yat\u2010Sen University, Kaohsiung, Taiwan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5028476747"],"corresponding_institution_ids":["https://openalex.org/I142974352"],"apc_list":null,"apc_paid":null,"fwci":0.2093,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61469686,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7213175892829895},{"id":"https://openalex.org/keywords/jpeg-2000","display_name":"JPEG 2000","score":0.6665569543838501},{"id":"https://openalex.org/keywords/maximization","display_name":"Maximization","score":0.5458493828773499},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.47693198919296265},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.47658440470695496},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.45884406566619873},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4294039011001587},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4210098385810852},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.39116358757019043},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.37047669291496277},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35447150468826294},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3381129801273346},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.32900863885879517},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.25348585844039917},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24047210812568665},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.13368400931358337},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12446478009223938},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.112364262342453}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7213175892829895},{"id":"https://openalex.org/C69216139","wikidata":"https://www.wikidata.org/wiki/Q931783","display_name":"JPEG 2000","level":5,"score":0.6665569543838501},{"id":"https://openalex.org/C2776330181","wikidata":"https://www.wikidata.org/wiki/Q18358244","display_name":"Maximization","level":2,"score":0.5458493828773499},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.47693198919296265},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.47658440470695496},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.45884406566619873},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4294039011001587},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4210098385810852},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.39116358757019043},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.37047669291496277},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35447150468826294},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3381129801273346},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.32900863885879517},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.25348585844039917},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24047210812568665},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.13368400931358337},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12446478009223938},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.112364262342453},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2014.6834866","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2014.6834866","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5199999809265137,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2015370045","https://openalex.org/W2030803967","https://openalex.org/W2031757805","https://openalex.org/W2056616238","https://openalex.org/W2099971661","https://openalex.org/W2133665775","https://openalex.org/W2142688241","https://openalex.org/W2144869312","https://openalex.org/W2153841776","https://openalex.org/W2164241781","https://openalex.org/W2170902568","https://openalex.org/W2476868371","https://openalex.org/W4251101141","https://openalex.org/W4252813286","https://openalex.org/W6682840539"],"related_works":["https://openalex.org/W2744643496","https://openalex.org/W2051928579","https://openalex.org/W2048419807","https://openalex.org/W2081795747","https://openalex.org/W3094423394","https://openalex.org/W2357721494","https://openalex.org/W1553422968","https://openalex.org/W2046159858","https://openalex.org/W1974416117","https://openalex.org/W2168458994"],"abstract_inverted_index":{"With":[0],"the":[1,52,73,81,103,113,125,135,156,159],"advance":[2],"of":[3,10,27,54,83,137,158],"semiconductor":[4],"manufacturing":[5],"technology,":[6],"low":[7],"yield":[8,26,55],"issue":[9],"a":[11,58],"circuit/system":[12],"has":[13],"received":[14],"much":[15],"attention.":[16],"Error-tolerance":[17],"is":[18],"an":[19,43,98],"innovative":[20],"concept":[21],"that":[22,80,108],"can":[23,110,121],"significantly":[24],"improve":[25],"integrated":[28],"circuits":[29],"(IC's)":[30],"by":[31,70],"identifying":[32],"defective":[33],"yet":[34],"acceptable":[35,84],"chips.":[36],"In":[37,144],"this":[38],"paper":[39],"we":[40,146],"first":[41],"employ":[42],"Inverse":[44],"Discrete":[45],"Wavelet":[46],"Transform":[47],"(IDWT)":[48],"circuit":[49],"to":[50,91,133,153],"illustrate":[51],"potential":[53],"improvement":[56],"in":[57,72],"JPEG2000":[59],"decoder":[60],"via":[61],"error-tolerance.":[62],"We":[63,95],"then":[64],"carefully":[65,93],"analyze":[66],"error":[67],"distribution":[68],"induced":[69],"faults":[71],"IDWT":[74],"design.":[75],"The":[76],"analysis":[77,101],"results":[78],"reveal":[79],"identification":[82],"chips":[85],"will":[86],"be":[87,92],"challenging":[88],"and":[89,106,120],"needs":[90],"addressed.":[94],"also":[96,147],"conduct":[97],"architectural":[99],"error-tolerability":[100],"on":[102],"target":[104],"design":[105,142],"show":[107],"one":[109],"easily":[111],"identify":[112],"internal":[114],"locations":[115,130],"where":[116],"errors":[117,138],"are":[118],"unacceptable,":[119],"therefore":[122],"re-design":[123],"only":[124],"circuitry":[126],"associated":[127],"with":[128],"these":[129],"so":[131],"as":[132,139,141],"reduce":[134],"significance":[136],"well":[140],"costs.":[143],"addition":[145],"discuss":[148],"possible":[149],"image":[150],"post-processing":[151],"methods":[152],"further":[154],"increase":[155],"acceptability":[157],"designs.":[160]},"counts_by_year":[{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}