{"id":"https://openalex.org/W2162609941","doi":"https://doi.org/10.1109/vlsi-dat.2012.6212645","title":"Area and reliability efficient ECC scheme for 3D RAMs","display_name":"Area and reliability efficient ECC scheme for 3D RAMs","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2162609941","doi":"https://doi.org/10.1109/vlsi-dat.2012.6212645","mag":"2162609941"},"language":"en","primary_location":{"id":"doi:10.1109/vlsi-dat.2012.6212645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2012.6212645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of Technical Program of 2012 VLSI Design, Automation and Test","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022273060","display_name":"Li-Jung Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Li-Jung Chang","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Jhongli, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Jhongli, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109093165","display_name":"Yu-Jen Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Jen Huang","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Jhongli, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Jhongli, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100741020","display_name":"Jin-Fu Li","orcid":"https://orcid.org/0000-0003-1961-9674"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jin-Fu Li","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Jhongli, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Jhongli, Taiwan","institution_ids":["https://openalex.org/I22265921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5022273060"],"corresponding_institution_ids":["https://openalex.org/I22265921"],"apc_list":null,"apc_paid":null,"fwci":0.491,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.70769139,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.7680153846740723},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.6343562006950378},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6274644732475281},{"id":"https://openalex.org/keywords/electromagnetic-shielding","display_name":"Electromagnetic shielding","score":0.6092227101325989},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.569485604763031},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.5077891945838928},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5032004714012146},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.48938173055648804},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.4616360366344452},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3247906565666199},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2875911593437195},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.22312340140342712},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.20923542976379395},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18413370847702026},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11604353785514832},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11219021677970886}],"concepts":[{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.7680153846740723},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.6343562006950378},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6274644732475281},{"id":"https://openalex.org/C2265751","wikidata":"https://www.wikidata.org/wiki/Q332007","display_name":"Electromagnetic shielding","level":2,"score":0.6092227101325989},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.569485604763031},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.5077891945838928},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5032004714012146},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.48938173055648804},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.4616360366344452},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3247906565666199},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2875911593437195},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.22312340140342712},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.20923542976379395},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18413370847702026},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11604353785514832},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11219021677970886},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vlsi-dat.2012.6212645","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vlsi-dat.2012.6212645","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of Technical Program of 2012 VLSI Design, Automation and Test","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320337392","display_name":"Division of Electrical, Communications and Cyber Systems","ror":"https://ror.org/01krpsy48"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1975691531","https://openalex.org/W2027712195","https://openalex.org/W2047569150","https://openalex.org/W2099165406","https://openalex.org/W2107304970","https://openalex.org/W2111101793","https://openalex.org/W2116462433","https://openalex.org/W2125213532","https://openalex.org/W2127178251","https://openalex.org/W2142850400","https://openalex.org/W4229781124","https://openalex.org/W6675139149"],"related_works":["https://openalex.org/W2016970881","https://openalex.org/W2333804548","https://openalex.org/W1990828594","https://openalex.org/W3093450488","https://openalex.org/W2027159884","https://openalex.org/W2016589506","https://openalex.org/W3163301441","https://openalex.org/W1522190160","https://openalex.org/W2156107436","https://openalex.org/W2534942874"],"abstract_inverted_index":{"Soft":[0],"error":[1],"is":[2,20,57,92],"one":[3],"critical":[4],"issue":[5],"faced":[6],"by":[7,79],"nano-scale":[8],"random":[9],"access":[10],"memories":[11],"(RAMs).":[12],"Three-dimensional":[13],"(3D)":[14],"RAM":[15,31,122],"with":[16],"through-silicon":[17],"via":[18],"(TSV)":[19],"a":[21,120],"new":[22],"approach":[23],"for":[24,46,76,104],"overcoming":[25],"the":[26,39,43,47,51,54,62,83,97,101,111,117],"memory":[27],"wall.":[28],"A":[29],"3D":[30,77,105,121],"consists":[32],"of":[33,82,119],"multiple":[34],"dies":[35],"vertically":[36],"stacked.":[37],"Therefore,":[38],"upper":[40,55],"die":[41,56],"provides":[42],"shielding":[44,84],"effect":[45],"lower":[48,63],"die.":[49,64],"Thus,":[50],"SER":[52],"in":[53,61],"higher":[58],"than":[59],"that":[60,110],"This":[65],"paper":[66],"proposes":[67],"an":[68],"area":[69,87,125],"and":[70,88],"reliability":[71,89,118],"efficient":[72],"ECC":[73],"(ARE-ECC)":[74],"scheme":[75,103,113],"RAMs":[78],"taking":[80],"advantage":[81],"effect.":[85],"An":[86],"optimization":[90],"algorithm":[91],"also":[93],"proposed":[94],"to":[95,99],"aid":[96],"designer":[98],"design":[100],"ARE-ECC":[102,112],"RAMs.":[106],"Simulation":[107],"results":[108],"show":[109],"can":[114],"effectively":[115],"increase":[116],"using":[123],"small":[124],"overhead.":[126]},"counts_by_year":[{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
