{"id":"https://openalex.org/W4403278464","doi":"https://doi.org/10.1109/vdat63601.2024.10705433","title":"Design and Implementation of an FPGA-based Emulator Circuit for MLP using Memristors","display_name":"Design and Implementation of an FPGA-based Emulator Circuit for MLP using Memristors","publication_year":2024,"publication_date":"2024-09-01","ids":{"openalex":"https://openalex.org/W4403278464","doi":"https://doi.org/10.1109/vdat63601.2024.10705433"},"language":"en","primary_location":{"id":"doi:10.1109/vdat63601.2024.10705433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat63601.2024.10705433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 28th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051118545","display_name":"B. Naresh Kumar Reddy","orcid":"https://orcid.org/0000-0001-8434-3673"},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"B. Naresh Kumar Reddy","raw_affiliation_strings":["NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India"],"affiliations":[{"raw_affiliation_string":"NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India","institution_ids":["https://openalex.org/I122964287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021908794","display_name":"Srinivasulu Jogi","orcid":"https://orcid.org/0000-0002-3922-9705"},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Srinivasulu Jogi","raw_affiliation_strings":["NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India"],"affiliations":[{"raw_affiliation_string":"NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India","institution_ids":["https://openalex.org/I122964287"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024084480","display_name":"K. Sarangam","orcid":null},"institutions":[{"id":"https://openalex.org/I121750182","display_name":"National Institute of Technology Warangal","ror":"https://ror.org/017ebfz38","country_code":"IN","type":"education","lineage":["https://openalex.org/I121750182"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sarangam K","raw_affiliation_strings":["NIT Warangal,Department of ECE,Telangana,India"],"affiliations":[{"raw_affiliation_string":"NIT Warangal,Department of ECE,Telangana,India","institution_ids":["https://openalex.org/I121750182"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5051118545"],"corresponding_institution_ids":["https://openalex.org/I122964287"],"apc_list":null,"apc_paid":null,"fwci":1.8965,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.86325997,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6686999797821045,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.6686999797821045,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12784","display_name":"Modular Robots and Swarm Intelligence","score":0.6654000282287598,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.663100004196167,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8580881357192993},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8458808660507202},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6653650999069214},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5469581484794617},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38679128885269165},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3554132580757141},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1779603660106659}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8580881357192993},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8458808660507202},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6653650999069214},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5469581484794617},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38679128885269165},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3554132580757141},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1779603660106659}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vdat63601.2024.10705433","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat63601.2024.10705433","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 28th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2028034460","https://openalex.org/W2148347268","https://openalex.org/W2171882382","https://openalex.org/W2519109807","https://openalex.org/W2540646523","https://openalex.org/W2557481418","https://openalex.org/W2766561181","https://openalex.org/W2773219026","https://openalex.org/W2783261582","https://openalex.org/W2906472504","https://openalex.org/W3016986506","https://openalex.org/W3037970528","https://openalex.org/W3171600129","https://openalex.org/W4283209136","https://openalex.org/W6776669401"],"related_works":["https://openalex.org/W4229452466","https://openalex.org/W2966276069","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W4401034269","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"In":[0,97,163],"today\u2019s":[1],"world,":[2],"the":[3,70,98,109,113,127,134,140,143,159,172,177,182,188,230],"Multilayer":[4],"Perceptron":[5],"(MLP)":[6],"has":[7],"various":[8,83],"applications":[9,50,81],"in":[10,26,82],"computer":[11],"architecture.":[12],"Memristors":[13],"which":[14,138],"are":[15,46,76,130,149],"non-volatile":[16],"memory":[17],"devices,":[18],"can":[19],"be":[20,225],"used":[21],"to":[22,126,157,170,180],"implement":[23],"synaptic":[24],"weights":[25,114,141],"MLPs.":[27,197],"FPGA-based":[28,102],"emulators":[29,45],"offer":[30,205],"a":[31,116,120,238],"flexible":[32],"and":[33,38,61,79,90,93,151,175,193,211,227,235],"efficient":[34,53],"platform":[35],"for":[36,49,105,190,201,217],"testing":[37],"optimizing":[39],"MLPs":[40,75,202],"that":[41,51],"utilize":[42],"memristors.":[43],"These":[44],"particularly":[47],"well-suited":[48,216],"demand":[52],"processing":[54,219],"of":[55,72,100,115,142,196],"binary":[56],"data,":[57],"such":[58,73,85,207],"as":[59,86,208],"image":[60,89],"video":[62],"analysis.":[63],"Previously":[64],"developed":[65],"technologies":[66],"have":[67],"successfully":[68],"addressed":[69],"requirements":[71],"applications.":[74,220],"highly":[77],"versatile":[78],"find":[80],"tasks,":[84],"pattern":[87],"recognition,":[88,92],"speech":[91],"natural":[94],"language":[95],"processing.":[96],"context":[99],"an":[101,154,166],"emulator":[103,199],"circuit":[104],"MLP":[106,118],"using":[107,203,229],"memristors,":[108],"process":[110],"involves":[111],"mapping":[112],"pre-trained":[117],"onto":[119],"memristor":[121,136,173],"crossbar":[122],"array.":[123],"The":[124,146,198,221],"inputs":[125],"neural":[128,144,160],"network":[129],"then":[131],"multiplied":[132],"by":[133],"corresponding":[135],"conductances,":[137],"represent":[139],"network.":[145],"resulting":[147],"currents":[148],"summed":[150],"passed":[152],"through":[153],"activation":[155],"function":[156],"generate":[158,181],"network\u2019s":[161],"output.":[162,184],"this":[164],"implementation,":[165],"FPGA":[167,240],"is":[168],"utilized":[169],"program":[171],"array":[174],"perform":[176],"necessary":[178],"computations":[179],"desired":[183],"This":[185],"approach":[186],"holds":[187],"potential":[189],"achieving":[191],"high-speed":[192],"energy-efficient":[194],"implementations":[195],"circuits":[200],"memristors":[204],"benefits":[206],"faster":[209],"training":[210],"interface":[212],"times,":[213],"making":[214],"them":[215],"real-time":[218],"proposed":[222],"method":[223],"will":[224],"synthesized":[226],"simulated":[228],"Vivado":[231],"Design":[232],"Suite":[233],"2022.1":[234],"realized":[236],"on":[237],"Kintex-7":[239],"board.":[241]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":8}],"updated_date":"2026-03-25T14:56:36.534964","created_date":"2025-10-10T00:00:00"}