{"id":"https://openalex.org/W3213966144","doi":"https://doi.org/10.1109/vdat53777.2021.9601131","title":"Automated Design of Analog Circuits using Machine Learning Techniques","display_name":"Automated Design of Analog Circuits using Machine Learning Techniques","publication_year":2021,"publication_date":"2021-09-16","ids":{"openalex":"https://openalex.org/W3213966144","doi":"https://doi.org/10.1109/vdat53777.2021.9601131","mag":"3213966144"},"language":"en","primary_location":{"id":"doi:10.1109/vdat53777.2021.9601131","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat53777.2021.9601131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 25th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028120019","display_name":"R. Sindhiya Devi","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"S Devi","raw_affiliation_strings":["IIT Bombay, Mumbai, India"],"affiliations":[{"raw_affiliation_string":"IIT Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078407126","display_name":"Gourav Tilwankar","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gourav Tilwankar","raw_affiliation_strings":["IIT Bombay, Mumbai, India"],"affiliations":[{"raw_affiliation_string":"IIT Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091782947","display_name":"Rajesh Zele","orcid":null},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajesh Zele","raw_affiliation_strings":["IIT Bombay, Mumbai, India"],"affiliations":[{"raw_affiliation_string":"IIT Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5028120019"],"corresponding_institution_ids":["https://openalex.org/I162827531"],"apc_list":null,"apc_paid":null,"fwci":0.9107,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.74514487,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.6639111042022705},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6452135443687439},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5654416680335999},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.49006855487823486},{"id":"https://openalex.org/keywords/mean-squared-error","display_name":"Mean squared error","score":0.41408947110176086},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1812528669834137},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.11858540773391724}],"concepts":[{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.6639111042022705},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6452135443687439},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5654416680335999},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.49006855487823486},{"id":"https://openalex.org/C139945424","wikidata":"https://www.wikidata.org/wiki/Q1940696","display_name":"Mean squared error","level":2,"score":0.41408947110176086},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1812528669834137},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.11858540773391724}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/vdat53777.2021.9601131","is_oa":false,"landing_page_url":"https://doi.org/10.1109/vdat53777.2021.9601131","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 25th International Symposium on VLSI Design and Test (VDAT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2165666706","https://openalex.org/W2751318774","https://openalex.org/W2810819597","https://openalex.org/W2884669534","https://openalex.org/W2994891834","https://openalex.org/W2998324702","https://openalex.org/W3107965887","https://openalex.org/W4206070770","https://openalex.org/W4289143671","https://openalex.org/W6757150747"],"related_works":["https://openalex.org/W2961085424","https://openalex.org/W4306674287","https://openalex.org/W3046775127","https://openalex.org/W3107602296","https://openalex.org/W3170094116","https://openalex.org/W4386462264","https://openalex.org/W3209574120","https://openalex.org/W4364306694","https://openalex.org/W4312192474","https://openalex.org/W4283697347"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"methodology":[3],"for":[4,17,48,65],"an":[5,18],"automated":[6],"design":[7,56],"of":[8,120],"analog":[9,54],"circuits":[10],"using":[11,26,59],"global":[12],"Artificial":[13],"Neural":[14],"Network":[15],"(ANN)":[16],"optimised":[19,22],"dataset.":[20],"The":[21,76,95],"dataset":[23,41],"is":[24,57],"generated":[25],"simulation":[27],"based":[28,61,92,111],"g":[29,102],"<inf":[30,34,103,107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[31,35,104,108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">m</inf>":[32,105],"/I":[33,106],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">d</inf>":[36,109],"technique,":[37],"which":[38],"reduces":[39],"the":[40,45,100],"size":[42],"and":[43,51,70,86,122],"also":[44],"time":[46],"required":[47],"data":[49],"collection":[50],"analysis.":[52],"Automated":[53],"circuit":[55],"implemented":[58],"ANN":[60,112],"supervised":[62,87],"learning":[63,88],"technique":[64,89,110],"a":[66,71,115],"common":[67],"source":[68],"amplifier":[69],"two":[72],"stage":[73],"single-ended":[74],"opamp.":[75],"results":[77,97],"obtained":[78],"are":[79],"compared":[80],"with":[81],"unsupervised":[82],"(Reinforcement":[83],"Learning":[84],"algorithm)":[85],"(Genetic":[90],"Algorithm":[91],"local":[93],"ANN).":[94],"comparison":[96],"shows":[98],"that":[99],"proposed":[101],"model":[113],"gives":[114],"better":[116],"accuracy":[117],"in":[118],"terms":[119],"score":[121],"mean":[123],"square":[124],"error":[125],"(MSE).":[126]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":14},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":5}],"updated_date":"2026-03-27T14:29:43.386196","created_date":"2025-10-10T00:00:00"}
