{"id":"https://openalex.org/W7162677016","doi":"https://doi.org/10.1109/tvlsi.2026.3691186","title":"Corrections to \u201cA Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks\u201d","display_name":"Corrections to \u201cA Hardware Attack Secure SRAM: A HAS-16T SRAM Cell Resistant to Side Channel Attacks and Fault-Injection Attacks\u201d","publication_year":2026,"publication_date":"2026-05-01","ids":{"openalex":"https://openalex.org/W7162677016","doi":"https://doi.org/10.1109/tvlsi.2026.3691186"},"language":null,"primary_location":{"id":"doi:10.1109/tvlsi.2026.3691186","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3691186","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"erratum","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068846182","display_name":"Priyanka Sharma","orcid":"https://orcid.org/0000-0002-9926-2697"},"institutions":[{"id":"https://openalex.org/I138272832","display_name":"Devi Ahilya Vishwavidyalaya","ror":"https://ror.org/05c2p1f98","country_code":"IN","type":"education","lineage":["https://openalex.org/I138272832"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Priyanka Sharma","raw_affiliation_strings":["Department of Electronics Instrumentation, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"],"raw_orcid":"https://orcid.org/0000-0002-9926-2697","affiliations":[{"raw_affiliation_string":"Department of Electronics Instrumentation, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India","institution_ids":["https://openalex.org/I138272832"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5137277601","display_name":"Nitesh Kumar Soni","orcid":"https://orcid.org/0000-0002-9946-0212"},"institutions":[{"id":"https://openalex.org/I4210119567","display_name":"Medi-Caps University","ror":"https://ror.org/02svf5f06","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210119567"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nitesh Kumar Soni","raw_affiliation_strings":["Department of Electronics Engineering, Medicaps University, Indore, Madhya Pradesh, India"],"raw_orcid":"https://orcid.org/0000-0002-9946-0212","affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, Medicaps University, Indore, Madhya Pradesh, India","institution_ids":["https://openalex.org/I4210119567"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063975084","display_name":"Vaibhav Neema","orcid":"https://orcid.org/0000-0003-0922-373X"},"institutions":[{"id":"https://openalex.org/I138272832","display_name":"Devi Ahilya Vishwavidyalaya","ror":"https://ror.org/05c2p1f98","country_code":"IN","type":"education","lineage":["https://openalex.org/I138272832"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vaibhav Neema","raw_affiliation_strings":["Department of Electronics and Telecommunication, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunication, Institute of Engineering and Technology, Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India","institution_ids":["https://openalex.org/I138272832"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048924732","display_name":"Shailesh Singh Chouhan","orcid":"https://orcid.org/0000-0002-6055-3198"},"institutions":[{"id":"https://openalex.org/I190632392","display_name":"Lule\u00e5 University of Technology","ror":"https://ror.org/016st3p78","country_code":"SE","type":"education","lineage":["https://openalex.org/I190632392"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Shailesh Singh Chouhan","raw_affiliation_strings":["Department of Computer Science, Electrical and Space Engineering, Lule&#x00E5; University of Technology, Lule&#x00E5;, Norbotten, Sweden"],"raw_orcid":"https://orcid.org/0000-0002-6055-3198","affiliations":[{"raw_affiliation_string":"Department of Computer Science, Electrical and Space Engineering, Lule&#x00E5; University of Technology, Lule&#x00E5;, Norbotten, Sweden","institution_ids":["https://openalex.org/I190632392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5125440500","display_name":"Rakesh Singhai","orcid":null},"institutions":[{"id":"https://openalex.org/I138272832","display_name":"Devi Ahilya Vishwavidyalaya","ror":"https://ror.org/05c2p1f98","country_code":"IN","type":"education","lineage":["https://openalex.org/I138272832"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rakesh Singhai","raw_affiliation_strings":["Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Devi Ahilya Vishwavidyalaya, Indore, Madhya Pradesh, India","institution_ids":["https://openalex.org/I138272832"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"5","first_page":"1697","last_page":"1697"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.4846000075340271,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.4846000075340271,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.46889999508857727,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.012400000356137753,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.7663000226020813},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.44269999861717224},{"id":"https://openalex.org/keywords/timing-attack","display_name":"Timing attack","score":0.3052000105381012},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.3046000003814697},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.28060001134872437}],"concepts":[{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.7663000226020813},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6840999722480774},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5041000247001648},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.48899999260902405},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.44269999861717224},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.36480000615119934},{"id":"https://openalex.org/C28420585","wikidata":"https://www.wikidata.org/wiki/Q2665075","display_name":"Timing attack","level":4,"score":0.3052000105381012},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.3046000003814697},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.28060001134872437},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2736000120639801},{"id":"https://openalex.org/C39217717","wikidata":"https://www.wikidata.org/wiki/Q1432354","display_name":"Hardware security module","level":3,"score":0.2736000120639801},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.27129998803138733}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2026.3691186","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3691186","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"This":[0],"addresses":[1],"the":[2],"error":[3],"in":[4],"[1].":[5],"Table":[6],"I":[7],"Column":[8],"1":[9],"wrong":[10],"citation:":[11],"8T":[12],"[14]ST-12T":[13],"[15]LC-7T":[14],"[16]QUCC-12T":[15],"[17]RHBD-14T":[16],"[18]SEUH-12T":[17],"[19]RH-12T":[18],"[20]RH-14T":[19],"[21]EQ-14T":[20],"[22].":[21]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-05-29T00:00:00"}
