{"id":"https://openalex.org/W7138921875","doi":"https://doi.org/10.1109/tvlsi.2026.3673338","title":"A Multimode Built-In Self-Test Circuit for Sequential Cell Timing Characteristics Based on Digital-to-Time Converter","display_name":"A Multimode Built-In Self-Test Circuit for Sequential Cell Timing Characteristics Based on Digital-to-Time Converter","publication_year":2026,"publication_date":"2026-03-18","ids":{"openalex":"https://openalex.org/W7138921875","doi":"https://doi.org/10.1109/tvlsi.2026.3673338"},"language":null,"primary_location":{"id":"doi:10.1109/tvlsi.2026.3673338","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3673338","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Wenwen Cai","orcid":"https://orcid.org/0009-0008-0313-7498"},"institutions":[{"id":"https://openalex.org/I74525822","display_name":"Hubei University of Technology","ror":"https://ror.org/02d3fj342","country_code":"CN","type":"education","lineage":["https://openalex.org/I74525822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenwen Cai","raw_affiliation_strings":["School of Science, Hubei University of Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0009-0008-0313-7498","affiliations":[{"raw_affiliation_string":"School of Science, Hubei University of Technology, Wuhan, China","institution_ids":["https://openalex.org/I74525822"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110960966","display_name":"Yanhui Zhao","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanhui Zhao","raw_affiliation_strings":["College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0009-0005-9720-4062","affiliations":[{"raw_affiliation_string":"College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104159351","display_name":"Zhengrui Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhengrui Chen","raw_affiliation_strings":["College of Integrated Circuits, Zhejiang University, Hangzhou, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Integrated Circuits, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5130109484","display_name":"Pan Zheng","orcid":null},"institutions":[{"id":"https://openalex.org/I74525822","display_name":"Hubei University of Technology","ror":"https://ror.org/02d3fj342","country_code":"CN","type":"education","lineage":["https://openalex.org/I74525822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Pan Zheng","raw_affiliation_strings":["School of Science, Hubei University of Technology, Wuhan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Science, Hubei University of Technology, Wuhan, China","institution_ids":["https://openalex.org/I74525822"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100708268","display_name":"Yang Cui","orcid":"https://orcid.org/0000-0002-6053-5571"},"institutions":[{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yang Cui","raw_affiliation_strings":["School of Integrated Circuit, Huazhong University of Science and Technology, Wuhan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Huazhong University of Science and Technology, Wuhan, China","institution_ids":["https://openalex.org/I47720641"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101808316","display_name":"Wei Zou","orcid":"https://orcid.org/0000-0002-8683-9880"},"institutions":[{"id":"https://openalex.org/I74525822","display_name":"Hubei University of Technology","ror":"https://ror.org/02d3fj342","country_code":"CN","type":"education","lineage":["https://openalex.org/I74525822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Zou","raw_affiliation_strings":["School of Science, Hubei University of Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0000-0002-8683-9880","affiliations":[{"raw_affiliation_string":"School of Science, Hubei University of Technology, Wuhan, China","institution_ids":["https://openalex.org/I74525822"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5129792252","display_name":"Xuecheng Zou","orcid":null},"institutions":[{"id":"https://openalex.org/I47720641","display_name":"Huazhong University of Science and Technology","ror":"https://ror.org/00p991c53","country_code":"CN","type":"education","lineage":["https://openalex.org/I47720641"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuecheng Zou","raw_affiliation_strings":["School of Integrated Circuit, Huazhong University of Science and Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0000-0002-6404-5270","affiliations":[{"raw_affiliation_string":"School of Integrated Circuit, Huazhong University of Science and Technology, Wuhan, China","institution_ids":["https://openalex.org/I47720641"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5130139262","display_name":"Cheng Zhuo","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cheng Zhuo","raw_affiliation_strings":["College of Integrated Circuits, Zhejiang University, Hangzhou, China"],"raw_orcid":"https://orcid.org/0000-0002-2610-7522","affiliations":[{"raw_affiliation_string":"College of Integrated Circuits, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5130097406","display_name":"Li Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I74525822","display_name":"Hubei University of Technology","ror":"https://ror.org/02d3fj342","country_code":"CN","type":"education","lineage":["https://openalex.org/I74525822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Zhang","raw_affiliation_strings":["School of Science, Hubei University of Technology, Wuhan, China"],"raw_orcid":"https://orcid.org/0000-0002-8951-4969","affiliations":[{"raw_affiliation_string":"School of Science, Hubei University of Technology, Wuhan, China","institution_ids":["https://openalex.org/I74525822"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.26385895,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"6","first_page":"1965","last_page":"1977"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.6237000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.6237000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.28060001134872437,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.05559999868273735,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multi-mode-optical-fiber","display_name":"Multi-mode optical fiber","score":0.67330002784729},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5552999973297119},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4074000120162964},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.38920000195503235},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.3808000087738037},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.37720000743865967},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.36160001158714294},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.3601999878883362}],"concepts":[{"id":"https://openalex.org/C101645829","wikidata":"https://www.wikidata.org/wiki/Q1781857","display_name":"Multi-mode optical fiber","level":3,"score":0.67330002784729},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6294999718666077},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5874000191688538},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5552999973297119},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4074000120162964},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.38920000195503235},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.3808000087738037},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.37720000743865967},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.36160001158714294},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.3601999878883362},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.3199000060558319},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.3034000098705292},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2930000126361847},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2806999981403351},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2802000045776367},{"id":"https://openalex.org/C2779304628","wikidata":"https://www.wikidata.org/wiki/Q3503480","display_name":"Face (sociological concept)","level":2,"score":0.27480000257492065},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.26750001311302185},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.2655999958515167},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26409998536109924},{"id":"https://openalex.org/C19619285","wikidata":"https://www.wikidata.org/wiki/Q196372","display_name":"Observational error","level":2,"score":0.2628999948501587}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2026.3673338","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3673338","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44877853989601135,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G4982023464","display_name":null,"funder_award_id":"62304074","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"To":[0,79],"address":[1],"the":[2,56,81,119,135],"growing":[3],"challenges":[4],"in":[5,146],"high-precision":[6],"timing":[7,61],"characterization,":[8],"where":[9],"conventional":[10],"measurement":[11,58,82,153],"methods":[12],"face":[13],"limitations":[14],"due":[15],"to":[16,157,161,173],"increasing":[17],"process":[18,149],"variations":[19],"and":[20,52,65,76,103,126,159,165],"multicharacteristic":[21],"testing":[22],"demands,":[23],"this":[24],"work":[25],"presents":[26],"an":[27],"innovative":[28],"multimode":[29,44],"built-in":[30],"self-test":[31],"(BIST)":[32],"circuit":[33,41,110],"based":[34],"on":[35],"a":[36,43,50,53,86,90,98,104,112,122,147,166],"digital-to-time":[37],"converter":[38],"(DTC).":[39],"This":[40],"comprises":[42],"design":[45],"under":[46],"test":[47],"(DUT)":[48],"module,":[49],"DTC,":[51],"controller,":[54],"enabling":[55],"simultaneous":[57],"of":[59,115,155,171],"critical":[60],"characteristics":[62],"(setup/hold":[63],"times":[64],"CK\u2013Q/QN":[66],"delays)":[67],"across":[68],"multiple":[69],"sequential":[70],"cells":[71],"with":[72,118],"varying":[73],"trigger":[74],"types":[75],"clock":[77],"edges.":[78],"enhance":[80],"performance,":[83],"we":[84],"propose":[85],"DTC":[87,120],"architecture":[88],"featuring":[89],"digitally":[91],"controlled":[92],"multilevel":[93,105],"tunable":[94],"delay":[95,101,168],"cell":[96],"within":[97],"two-stage":[99],"\u201ccoarse\u2013fine\u201d":[100],"chain":[102],"switching":[106],"mechanism.":[107],"The":[108],"BIST":[109,137],"achieves":[111],"minimum":[113],"resolution":[114],"18.7":[116],"ps,":[117,163],"offering":[121],"10.5-ns":[123],"dynamic":[124],"range":[125,170],"high":[127],"linearity,":[128],"occupying":[129],"0.03":[130],"mm<sup":[131,141],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[132,142],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>,":[133],"while":[134],"total":[136],"area":[138],"is":[139],"0.58":[140],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>.":[143],"Experimental":[144],"results":[145],"180-nm":[148],"show":[150],"setup/hold":[151],"time":[152],"errors":[154],"\u221221":[156],"27":[158],"\u221227":[160],"25":[162],"respectively,":[164],"CK\u2013Q(QN)":[167],"error":[169],"\u221222.3":[172],"30.7":[174],"ps.":[175]},"counts_by_year":[],"updated_date":"2026-06-03T06:16:58.514037","created_date":"2026-03-20T00:00:00"}