{"id":"https://openalex.org/W7131240129","doi":"https://doi.org/10.1109/tvlsi.2026.3663564","title":"Efficient SoC Power Estimation With Machine Learning","display_name":"Efficient SoC Power Estimation With Machine Learning","publication_year":2026,"publication_date":"2026-02-24","ids":{"openalex":"https://openalex.org/W7131240129","doi":"https://doi.org/10.1109/tvlsi.2026.3663564"},"language":null,"primary_location":{"id":"doi:10.1109/tvlsi.2026.3663564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3663564","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108668664","display_name":"Sujay Pandit","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sujay Pandit","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":"https://orcid.org/0000-0003-2642-2386","affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5105369696","display_name":"Sujit Dey","orcid":"https://orcid.org/0000-0001-9671-3950"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sujit Dey","raw_affiliation_strings":["Department of Electrical and Computer Engineering, UC San Diego, San Diego, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, UC San Diego, San Diego, CA, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Elmore Family School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16186855,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"4","first_page":"1087","last_page":"1096"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.7109000086784363,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.7109000086784363,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.13040000200271606,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.04619999974966049,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/train","display_name":"Train","score":0.6435999870300293},{"id":"https://openalex.org/keywords/estimator","display_name":"Estimator","score":0.5498999953269958},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5282999873161316},{"id":"https://openalex.org/keywords/model-selection","display_name":"Model selection","score":0.4542999863624573},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.44440001249313354},{"id":"https://openalex.org/keywords/property","display_name":"Property (philosophy)","score":0.4375},{"id":"https://openalex.org/keywords/proxy","display_name":"Proxy (statistics)","score":0.4043999910354614},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.3813999891281128}],"concepts":[{"id":"https://openalex.org/C190839683","wikidata":"https://www.wikidata.org/wiki/Q2448197","display_name":"Train","level":2,"score":0.6435999870300293},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6223999857902527},{"id":"https://openalex.org/C185429906","wikidata":"https://www.wikidata.org/wiki/Q1130160","display_name":"Estimator","level":2,"score":0.5498999953269958},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5282999873161316},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.5192000269889832},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.4993000030517578},{"id":"https://openalex.org/C93959086","wikidata":"https://www.wikidata.org/wiki/Q6888345","display_name":"Model selection","level":2,"score":0.4542999863624573},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.44440001249313354},{"id":"https://openalex.org/C189950617","wikidata":"https://www.wikidata.org/wiki/Q937228","display_name":"Property (philosophy)","level":2,"score":0.4375},{"id":"https://openalex.org/C2780148112","wikidata":"https://www.wikidata.org/wiki/Q1432581","display_name":"Proxy (statistics)","level":2,"score":0.4043999910354614},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.3813999891281128},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.34360000491142273},{"id":"https://openalex.org/C2778012447","wikidata":"https://www.wikidata.org/wiki/Q1034415","display_name":"Scope (computer science)","level":2,"score":0.3352000117301941},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3244999945163727},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.3163999915122986},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.30709999799728394},{"id":"https://openalex.org/C114289077","wikidata":"https://www.wikidata.org/wiki/Q3284399","display_name":"Statistical model","level":2,"score":0.2964000105857849},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2815999984741211},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2809000015258789},{"id":"https://openalex.org/C16021271","wikidata":"https://www.wikidata.org/wiki/Q17152552","display_name":"Power domains","level":3,"score":0.2808000147342682},{"id":"https://openalex.org/C148483581","wikidata":"https://www.wikidata.org/wiki/Q446488","display_name":"Feature selection","level":2,"score":0.25999999046325684},{"id":"https://openalex.org/C96250715","wikidata":"https://www.wikidata.org/wiki/Q965330","display_name":"Estimation","level":2,"score":0.25949999690055847},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.25529998540878296}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2026.3663564","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2026.3663564","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8339386582374573,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1616044875","https://openalex.org/W1965125844","https://openalex.org/W2002072104","https://openalex.org/W2027829345","https://openalex.org/W2028800864","https://openalex.org/W2053484893","https://openalex.org/W2104773674","https://openalex.org/W2111589882","https://openalex.org/W2120000030","https://openalex.org/W2124523382","https://openalex.org/W2130942839","https://openalex.org/W2143727503","https://openalex.org/W2294097286","https://openalex.org/W2963309363","https://openalex.org/W2979854933","https://openalex.org/W3042760681","https://openalex.org/W3092027164","https://openalex.org/W3145579537","https://openalex.org/W3206406968","https://openalex.org/W3213528054","https://openalex.org/W4223929908","https://openalex.org/W4229807745","https://openalex.org/W4240199505","https://openalex.org/W4244593655","https://openalex.org/W4248651289","https://openalex.org/W4293261783","https://openalex.org/W4402349375"],"related_works":[],"abstract_inverted_index":{"We":[0,190],"propose":[1],"machine":[2],"learning":[3,97,164],"(ML)":[4],"power,":[5],"the":[6,117,147,186,227,245],"first":[7],"ML-based":[8,29,72,86,140,206],"framework":[9,66],"that:":[10],"1)":[11],"accelerates":[12],"end-to-end":[13],"RTL":[14,132,263],"power":[15,30,46,63,73,82,87,118,136,141,181,207,212,243,264,274],"estimation":[16,76,208,224,265],"by":[17,161],"addressing":[18],"both":[19],"its":[20],"key":[21],"bottlenecks\u2014RTL":[22],"simulation":[23,124],"and":[24,85,91,138,198,220],"power-model":[25],"evaluation\u2014and":[26],"2)":[27],"extends":[28],"models":[31,43,125,142],"to":[32,106,126,152,165,177,203],"system-on-chips":[33],"(SoCs)":[34],"with":[35,155,231,267],"configurable":[36,156,232],"intellectual":[37,157],"property":[38,158],"(IP)":[39,159],"blocks.":[40],"ML-Power":[41,151,192,235,254],"builds":[42],"that":[44,183],"predict":[45],"versus":[47],"time":[48],"traces":[49],"of":[50,59,69,116,131,170],"each":[51,144],"SoC":[52,197],"block":[53,145],"using":[54,95,162,249],"a":[55,101,108,113,167,179,261],"very":[56],"small":[57,168],"subset":[58,169],"internal":[60],"signals":[61],"called":[62],"proxies.":[64],"The":[65],"is":[67],"composed":[68],"three":[70],"components:":[71],"proxy":[74,83,119],"activity":[75],"(PACE),":[77],"exploiting":[78],"spatio-temporal":[79],"correlations":[80],"for":[81,143],"selection":[84,94],"model":[88,105,182],"evaluation":[89],"(SCOPE),":[90],"representative":[92,171],"configuration":[93],"active":[96,163],"(RECAL).":[98],"PACE":[99],"trains":[100,139,211],"sequence-to-sequence":[102],"(seq2seq)":[103],"ML":[104],"translate":[107],"transaction-level":[109],"execution":[110],"trace":[111,115],"into":[112],"cycle-level":[114],"signals,":[120],"allowing":[121],"much":[122],"faster":[123],"be":[127],"used":[128,176],"in":[129,241,272],"place":[130],"simulation.":[133],"SCOPE":[134,210],"selects":[135],"proxies":[137],"within":[146],"SoC.":[148],"RECAL":[149],"enables":[150],"handle":[153],"SoCs":[154,230],"blocks":[160],"select":[166],"configurations,":[172],"which":[173],"are":[174],"then":[175],"train":[178],"unified":[180],"generalizes":[184],"across":[185,244],"entire":[187,246],"design":[188,247],"space.":[189],"evaluate":[191],"on":[193],"an":[194],"ARM":[195],"SSE-300":[196],"two":[199,228],"RISC-V-based":[200],"SoCs.":[201],"Compared":[202],"prior":[204],"state-of-the-art":[205],"frameworks,":[209],"models$\\sim":[213],"65\\times":[214],"$faster,":[215],"picks":[216],"40%":[217],"fewer":[218],"proxies,":[219],"achieves":[221,236],"2%":[222],"lower":[223],"error.":[225],"For":[226],"RISC-V":[229],"IP":[233],"blocks,":[234],"less":[237,268],"than":[238,269],"10%":[239],"error":[240,271],"per-cycle":[242,273],"space":[248],"only":[250],"10\u201314":[251],"training":[252],"configurations.":[253],"also":[255],"achieves$\\sim":[256],"300\\times":[257],"$inference-time":[258],"speedup":[259],"over":[260],"commercial":[262],"tool":[266],"7%":[270],"estimates.":[275]},"counts_by_year":[],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2026-02-25T00:00:00"}
