{"id":"https://openalex.org/W4417438477","doi":"https://doi.org/10.1109/tvlsi.2025.3642311","title":"An Area-Efficient and Low-Latency ASIC Design of Deflate Data Compressor for SSD Applications","display_name":"An Area-Efficient and Low-Latency ASIC Design of Deflate Data Compressor for SSD Applications","publication_year":2025,"publication_date":"2025-12-17","ids":{"openalex":"https://openalex.org/W4417438477","doi":"https://doi.org/10.1109/tvlsi.2025.3642311"},"language":null,"primary_location":{"id":"doi:10.1109/tvlsi.2025.3642311","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2025.3642311","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019060163","display_name":"Nengyuan Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Nengyuan Sun","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064599381","display_name":"Ming Jin","orcid":"https://orcid.org/0000-0002-1977-8029"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ming Jin","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101629530","display_name":"Jianghong Li","orcid":"https://orcid.org/0000-0002-2544-7592"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianghong Li","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109794350","display_name":"Zhaoyi Niu","orcid":null},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhaoyi Niu","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033299709","display_name":"Jinghe Wang","orcid":"https://orcid.org/0000-0003-0757-3437"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jinghe Wang","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102838132","display_name":"Zhiyuan Pan","orcid":"https://orcid.org/0009-0000-2460-6590"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiyuan Pan","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111275384","display_name":"Jiafeng Cheng","orcid":"https://orcid.org/0009-0006-5798-5113"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jiafeng Cheng","raw_affiliation_strings":["Nanhu Laboratory, Jiaxing, Zhejiang, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanhu Laboratory, Jiaxing, Zhejiang, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081447891","display_name":"Wenrui Liu","orcid":"https://orcid.org/0000-0002-9501-7053"},"institutions":[{"id":"https://openalex.org/I4210136793","display_name":"Peng Cheng Laboratory","ror":"https://ror.org/03qdqbt06","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210136793"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenrui Liu","raw_affiliation_strings":["Quan Cheng Laboratory, Jinan, Shandong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Quan Cheng Laboratory, Jinan, Shandong, China","institution_ids":["https://openalex.org/I4210136793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101840117","display_name":"Kai Shi","orcid":"https://orcid.org/0000-0002-7174-7924"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kai Shi","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100365369","display_name":"Jiaqi Wang","orcid":"https://orcid.org/0000-0002-8523-3975"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiaqi Wang","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100462822","display_name":"Jiawei Zhang","orcid":"https://orcid.org/0000-0002-1206-3215"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiawei Zhang","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068721549","display_name":"Linhan Wang","orcid":"https://orcid.org/0009-0003-3862-1224"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Linhan Wang","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Kangning Song","orcid":null},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kangning Song","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100443897","display_name":"Xinyu Chen","orcid":"https://orcid.org/0000-0002-2534-9810"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xinyu Chen","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059976052","display_name":"Hongya Yu","orcid":"https://orcid.org/0000-0001-8972-6219"},"institutions":[{"id":"https://openalex.org/I10899854","display_name":"Jiangxi University of Traditional Chinese Medicine","ror":"https://ror.org/03jy32q83","country_code":"CN","type":"education","lineage":["https://openalex.org/I10899854"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haoxiang Yu","raw_affiliation_strings":["College of Computer Science, Jiangxi University of Chinese Medicine, Nanchang, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"College of Computer Science, Jiangxi University of Chinese Medicine, Nanchang, China","institution_ids":["https://openalex.org/I10899854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005650424","display_name":"Weize Yu","orcid":"https://orcid.org/0000-0002-8720-3083"},"institutions":[{"id":"https://openalex.org/I154099455","display_name":"Shandong University","ror":"https://ror.org/0207yh398","country_code":"CN","type":"education","lineage":["https://openalex.org/I154099455"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weize Yu","raw_affiliation_strings":["School of Integrated Circuits, Shandong University, Jinan, China"],"raw_orcid":"https://orcid.org/0000-0002-8720-3083","affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Shandong University, Jinan, China","institution_ids":["https://openalex.org/I154099455"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":16,"corresponding_author_ids":["https://openalex.org/A5019060163"],"corresponding_institution_ids":["https://openalex.org/I154099455"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.43973779,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"3","first_page":"1057","last_page":"1061"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.8454999923706055,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.8454999923706055,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.050999999046325684,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.027899999171495438,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/concatenation","display_name":"Concatenation (mathematics)","score":0.7075999975204468},{"id":"https://openalex.org/keywords/huffman-coding","display_name":"Huffman coding","score":0.7027999758720398},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5946999788284302},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.5224000215530396},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4564000070095062},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.45419999957084656},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.45170000195503235},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4332999885082245},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.39079999923706055}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7868000268936157},{"id":"https://openalex.org/C87619178","wikidata":"https://www.wikidata.org/wiki/Q126002","display_name":"Concatenation (mathematics)","level":2,"score":0.7075999975204468},{"id":"https://openalex.org/C46900642","wikidata":"https://www.wikidata.org/wiki/Q2647","display_name":"Huffman coding","level":3,"score":0.7027999758720398},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6794000267982483},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5946999788284302},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.5224000215530396},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4564000070095062},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.45419999957084656},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.45170000195503235},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4332999885082245},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.39079999923706055},{"id":"https://openalex.org/C67388219","wikidata":"https://www.wikidata.org/wiki/Q207440","display_name":"Hash table","level":3,"score":0.3824999928474426},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3521000146865845},{"id":"https://openalex.org/C25797200","wikidata":"https://www.wikidata.org/wiki/Q828137","display_name":"Compression ratio","level":3,"score":0.3497999906539917},{"id":"https://openalex.org/C131097465","wikidata":"https://www.wikidata.org/wiki/Q178898","display_name":"Gas compressor","level":2,"score":0.34790000319480896},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.34380000829696655},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.34049999713897705},{"id":"https://openalex.org/C47487241","wikidata":"https://www.wikidata.org/wiki/Q5227230","display_name":"Data access","level":2,"score":0.33059999346733093},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3264000117778778},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.31859999895095825},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.30140000581741333},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.29989999532699585},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.29649999737739563},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.28949999809265137},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.2816999852657318},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.28119999170303345}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2025.3642311","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2025.3642311","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3905672901","display_name":null,"funder_award_id":"ZR2024ZD05","funder_id":"https://openalex.org/F4320336925","funder_display_name":"Shandong Provincial Postdoctoral Science Foundation"},{"id":"https://openalex.org/G6359512766","display_name":null,"funder_award_id":"ZR2022QF079","funder_id":"https://openalex.org/F4320336925","funder_display_name":"Shandong Provincial Postdoctoral Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320322522","display_name":"Shandong University of Science and Technology","ror":"https://ror.org/04gtjhw98"},{"id":"https://openalex.org/F4320336925","display_name":"Shandong Provincial Postdoctoral Science Foundation","ror":null}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"In":[0],"this":[1],"brief,":[2],"a":[3,54,76,87,128,132,138,172],"high-speed":[4],"[multiway":[5],"parallel":[6],"(MWP)]":[7],"hardware-implemented":[8],"deflate":[9],"data":[10,46,69,109],"compressor":[11],"(DDC)":[12],"is":[13,91,124],"proposed":[14,121,164],"for":[15,40,80,93,171],"reducing":[16,81],"the":[17,25,28,48,62,65,67,82,95,102,107,113,120,153,163,167],"storage":[18],"of":[19,27,32,64,70,98,126,155],"solid-state":[20],"drives":[21],"(SSDs).":[22],"To":[23,59],"minimize":[24],"area":[26,63,142],"DDC,":[29,66],"registers":[30],"instead":[31],"static":[33],"random":[34],"access":[35,53],"memories":[36],"(SRAMs)":[37],"are":[38,50,73],"utilized":[39],"building":[41],"hash":[42,56],"tables":[43],"because":[44],"multiway":[45],"within":[47,112],"DDC":[49,123,165],"able":[51],"to":[52],"register-based":[55],"table":[57],"simultaneously.":[58],"further":[60],"reduce":[61],"output":[68,108],"indefinite":[71],"length":[72],"concatenated":[74],"with":[75,137],"tree-type":[77],"hardware":[78],"architecture":[79],"overall":[83],"concatenation":[84,110],"complexity.":[85],"Moreover,":[86],"solid":[88],"mathematical":[89],"foundation":[90],"established":[92],"optimizing":[94],"latency":[96],"values":[97],"Lempel\u2013Ziv":[99],"(LZ)77":[100],"circuit,":[101,105],"Huffman":[103],"encoding":[104],"and":[106,131,143],"circuit":[111],"MWP":[114,122],"DDC.":[115],"The":[116],"results":[117],"show":[118],"that":[119],"capable":[125],"achieving":[127],"12.1-Gb/s":[129],"throughput":[130],"1.76":[133],"compression":[134,169],"ratio":[135],"(CR)":[136],"1.17-mm<sup":[139],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[140,145],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[141],"0.103-<inline-formula":[144],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[146],"<tex-math":[147],"notation=\"LaTeX\">$\\mu":[148],"$</tex-math>":[149],"</inline-formula>s":[150],"latency,":[151],"under":[152],"synthesis":[154],"SMIC":[156],"55-nm":[157],"process":[158],"design":[159],"kits":[160],"(PDKs).":[161],"Hence,":[162],"satisfies":[166],"SSD":[168],"requirement":[170],"universal":[173],"serial":[174],"bus":[175],"(USB)":[176],"3.2":[177],"connector.":[178]},"counts_by_year":[],"updated_date":"2026-02-26T06:29:33.603293","created_date":"2025-12-17T00:00:00"}
