{"id":"https://openalex.org/W7103895097","doi":"https://doi.org/10.1109/tvlsi.2025.3624842","title":"A 0.31-V 16-Kb 9T SRAM With Enhanced Sensing Margin and Read Performance for Low-Power Applications","display_name":"A 0.31-V 16-Kb 9T SRAM With Enhanced Sensing Margin and Read Performance for Low-Power Applications","publication_year":2025,"publication_date":"2025-11-04","ids":{"openalex":"https://openalex.org/W7103895097","doi":"https://doi.org/10.1109/tvlsi.2025.3624842"},"language":null,"primary_location":{"id":"doi:10.1109/tvlsi.2025.3624842","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2025.3624842","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Pengyuan Zhao","orcid":"https://orcid.org/0000-0002-7603-1079"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Pengyuan Zhao","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Huidong Zhao","orcid":"https://orcid.org/0009-0005-1688-6373"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huidong Zhao","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Linnan Li","orcid":null},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Linnan Li","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Zhi Li","orcid":"https://orcid.org/0009-0000-5529-1421"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhi Li","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Minglong Jia","orcid":"https://orcid.org/0009-0001-0746-9376"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Minglong Jia","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Xiang Li","orcid":"https://orcid.org/0009-0005-1594-8800"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiang Li","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":null,"display_name":"Shushan Qiao","orcid":"https://orcid.org/0000-0002-9102-2111"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shushan Qiao","raw_affiliation_strings":["Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of the Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I19820366"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210119392"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.50468534,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"34","issue":"2","first_page":"672","last_page":"676"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9391999840736389,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9391999840736389,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.00989999994635582,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.009700000286102295,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.902999997138977},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5825999975204468},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.5698000192642212},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5260000228881836},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.48489999771118164},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.48339998722076416},{"id":"https://openalex.org/keywords/leakage-power","display_name":"Leakage power","score":0.47769999504089355},{"id":"https://openalex.org/keywords/low-voltage","display_name":"Low voltage","score":0.4390999972820282}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.902999997138977},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6049000024795532},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5825999975204468},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.5698000192642212},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5260000228881836},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.48489999771118164},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.48339998722076416},{"id":"https://openalex.org/C2987719587","wikidata":"https://www.wikidata.org/wiki/Q1811428","display_name":"Leakage power","level":4,"score":0.47769999504089355},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.44589999318122864},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.44279998540878296},{"id":"https://openalex.org/C128624480","wikidata":"https://www.wikidata.org/wiki/Q1504817","display_name":"Low voltage","level":3,"score":0.4390999972820282},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.39489999413490295},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.38839998841285706},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.38280001282691956},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3440999984741211},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3434999883174896},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.3411000072956085},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.3359000086784363},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.33550000190734863},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.3330000042915344},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.3255000114440918},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.3122999966144562},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.29269999265670776},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2782000005245209},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.26089999079704285},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25760000944137573}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2025.3624842","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2025.3624842","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8971416354179382,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1753784006","https://openalex.org/W2069909337","https://openalex.org/W2524971917","https://openalex.org/W2549127863","https://openalex.org/W2793901141","https://openalex.org/W2899871389","https://openalex.org/W2906595909","https://openalex.org/W2965280526","https://openalex.org/W3015626316","https://openalex.org/W3048576635","https://openalex.org/W3194836568","https://openalex.org/W4210321845","https://openalex.org/W4285106596","https://openalex.org/W4293206255","https://openalex.org/W4313478167","https://openalex.org/W4322706857","https://openalex.org/W4376130849","https://openalex.org/W4388240490","https://openalex.org/W4391924506"],"related_works":[],"abstract_inverted_index":{"This":[0],"brief":[1],"presents":[2],"a":[3,104,144],"low-power":[4],"9T":[5,26,101],"static":[6],"random":[7],"access":[8],"memory":[9],"(SRAM)":[10],"with":[11],"enhanced":[12,31],"read":[13,17,20,37,44,49],"sensing":[14,32],"margin":[15,33],"and":[16,41,65,114],"performance.":[18],"The":[19,51,84,127],"decoupled":[21],"port":[22],"of":[23,67,87,108,131,148],"the":[24,30,36,43,62,80,88,93,99,121,140,152],"proposed":[25],"SRAM":[27,58,102,142],"cell":[28,59],"achieves":[29,103],"by":[34],"mitigating":[35],"bitline":[38],"(RBL)":[39],"leakage":[40,63,146],"improves":[42],"performance":[45,66],"through":[46],"using":[47],"one-transistor":[48],"path.":[50],"multithreshold":[52],"voltage":[53,107,123],"devices":[54],"are":[55],"used":[56],"in":[57,92,151],"for":[60],"improving":[61],"power":[64,147],"SRAM.":[68],"Additionally,":[69],"an":[70],"interleaved":[71],"write":[72,81],"wordline":[73],"(WWL)":[74],"structure":[75],"is":[76,124,134],"implemented":[77],"to":[78],"address":[79],"half-select":[82],"issue.":[83],"measurement":[85],"results":[86],"test":[89],"chip":[90],"fabricated":[91],"22-nm":[94],"FDSOI":[95],"technology":[96],"demonstrate":[97],"that":[98],"designed":[100,141],"minimum":[105,128,145],"operation":[106],"0.31":[109],"V":[110],"at":[111,117,136],"1.05":[112],"MHz":[113,119],"can":[115],"operate":[116],"60.5":[118],"when":[120],"supply":[122],"0.5":[125],"V.":[126,138],"active":[129],"energy":[130],"18.56":[132],"fJ/access-bit":[133],"obtained":[135],"0.33":[137],"Furthermore,":[139],"exhibits":[143],"0.11":[149],"pW/bitcell":[150],"retention":[153],"mode.":[154]},"counts_by_year":[],"updated_date":"2026-01-25T23:04:38.658462","created_date":"2025-11-05T00:00:00"}
