{"id":"https://openalex.org/W4403021823","doi":"https://doi.org/10.1109/tvlsi.2024.3464870","title":"An End-to-End Bundled-Data Asynchronous Circuits Design Flow: From RTL to GDS","display_name":"An End-to-End Bundled-Data Asynchronous Circuits Design Flow: From RTL to GDS","publication_year":2024,"publication_date":"2024-10-01","ids":{"openalex":"https://openalex.org/W4403021823","doi":"https://doi.org/10.1109/tvlsi.2024.3464870"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2024.3464870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3464870","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032144027","display_name":"Jinghai Wang","orcid":"https://orcid.org/0009-0006-5263-8120"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jinghai Wang","raw_affiliation_strings":["School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079537451","display_name":"Shanlin Xiao","orcid":"https://orcid.org/0000-0002-1250-8704"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shanlin Xiao","raw_affiliation_strings":["School of Microelectronics Science and Technology, Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, Sun Yat-sen University, Zhuhai, China","Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]},{"raw_affiliation_string":"Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010373261","display_name":"Jilong Luo","orcid":null},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jilong Luo","raw_affiliation_strings":["School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100386167","display_name":"Bo Li","orcid":"https://orcid.org/0000-0002-7337-0112"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bo Li","raw_affiliation_strings":["School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010781243","display_name":"Lingfeng Zhou","orcid":"https://orcid.org/0009-0006-0301-0855"},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lingfeng Zhou","raw_affiliation_strings":["School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109151274","display_name":"Zhiyi Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I157773358","display_name":"Sun Yat-sen University","ror":"https://ror.org/0064kty71","country_code":"CN","type":"education","lineage":["https://openalex.org/I157773358"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiyi Yu","raw_affiliation_strings":["School of Microelectronics Science and Technology, Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, Sun Yat-sen University, Zhuhai, China","Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics Science and Technology, Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]},{"raw_affiliation_string":"Guangdong Provincial Key Laboratory of Optoelectronic Information Processing Chips and Systems, School of Microelectronics Science and Technology, Sun Yat-sen University, Zhuhai, China","institution_ids":["https://openalex.org/I157773358"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5032144027"],"corresponding_institution_ids":["https://openalex.org/I157773358"],"apc_list":null,"apc_paid":null,"fwci":1.2322,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.7981373,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"33","issue":"1","first_page":"154","last_page":"167"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/end-to-end-principle","display_name":"End-to-end principle","score":0.7653024196624756},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5910371541976929},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5385947823524475},{"id":"https://openalex.org/keywords/end-user","display_name":"End user","score":0.47387123107910156},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.44772934913635254},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3601417541503906},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3252067565917969},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.28860825300216675},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1252182126045227}],"concepts":[{"id":"https://openalex.org/C74296488","wikidata":"https://www.wikidata.org/wiki/Q2527392","display_name":"End-to-end principle","level":2,"score":0.7653024196624756},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5910371541976929},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5385947823524475},{"id":"https://openalex.org/C91262260","wikidata":"https://www.wikidata.org/wiki/Q528074","display_name":"End user","level":2,"score":0.47387123107910156},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.44772934913635254},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3601417541503906},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3252067565917969},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.28860825300216675},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1252182126045227}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2024.3464870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3464870","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5299999713897705,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G691677441","display_name":null,"funder_award_id":"62334014","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320322183","display_name":"Huawei Technologies","ror":"https://ror.org/00cmhce21"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W232434517","https://openalex.org/W1604973310","https://openalex.org/W2038202277","https://openalex.org/W2071429830","https://openalex.org/W2083794416","https://openalex.org/W2102327308","https://openalex.org/W2160785493","https://openalex.org/W2164653071","https://openalex.org/W2780397061","https://openalex.org/W2783525259","https://openalex.org/W2798690537","https://openalex.org/W2943443440","https://openalex.org/W2977854614","https://openalex.org/W2978614371","https://openalex.org/W3088147633","https://openalex.org/W3103997615","https://openalex.org/W3185068381","https://openalex.org/W4220741568","https://openalex.org/W4249868543","https://openalex.org/W4360605965","https://openalex.org/W4377971387","https://openalex.org/W4386764239","https://openalex.org/W4388709727","https://openalex.org/W4389888299","https://openalex.org/W4390874407","https://openalex.org/W4390993394","https://openalex.org/W4392174018","https://openalex.org/W4392930262","https://openalex.org/W4396918289","https://openalex.org/W4401568221","https://openalex.org/W6604992771","https://openalex.org/W6679991070","https://openalex.org/W6681167942","https://openalex.org/W6683394555"],"related_works":["https://openalex.org/W4299590256","https://openalex.org/W3163634122","https://openalex.org/W3119482857","https://openalex.org/W2919182614","https://openalex.org/W2166381389","https://openalex.org/W4393280045","https://openalex.org/W2054736184","https://openalex.org/W3159728998","https://openalex.org/W2677083173","https://openalex.org/W2485882820"],"abstract_inverted_index":{"Asynchronous":[0],"circuits":[1,41,94,128,155,200],"with":[2,201],"low":[3,44],"power":[4,235,248],"and":[5,19,25,47,151,165,215,250],"robustness":[6],"are":[7,146],"revived":[8],"in":[9,43,90,217],"emerging":[10],"applications":[11],"such":[12],"as":[13,153],"the":[14,29,69,139,149,167,189,218,228,238],"Internet":[15],"of":[16,31,141,192],"Things":[17],"(IoT)":[18],"neuromorphic":[20],"chips,":[21],"thanks":[22],"to":[23,98,115,173,188,205,224],"clock-less":[24],"event-driven":[26],"mechanisms.":[27],"However,":[28],"lack":[30],"mature":[32],"computer-aided":[33],"design":[34,45,59,183,190],"(CAD)":[35],"tools":[36],"for":[37,126],"designing":[38],"large-scale":[39],"asynchronous":[40,57,65,75,100,117,127,154,199,210,230,240],"results":[42],"efficiency":[46,259],"high":[48],"cost.":[49],"This":[50],"article":[51],"proposes":[52],"an":[53],"end-to-end":[54],"bundled-data":[55],"(BD)":[56],"circuit":[58,76,87],"flow,":[60],"which":[61],"can":[62,92,132],"facilitate":[63],"building":[64],"circuits,":[66,194],"even":[67],"if":[68],"designer":[70],"has":[71],"little":[72],"or":[73],"no":[74],"foundation.":[77],"Three":[78],"features":[79],"that":[80,130],"enable":[81],"this":[82,207],"are:":[83],"1)":[84],"a":[85,112,120],"lightweight":[86],"converter":[88],"developed":[89],"Python":[91],"convert":[93],"from":[95,171],"synchronous":[96,193,226],"descriptions":[97],"corresponding":[99],"ones":[101],"at":[102,261],"register":[103],"transfer":[104],"level":[105],"(RTL).":[106],"Desynchronization":[107],"flow":[108,170,191],"helps":[109,196],"designers":[110,197],"maintain":[111],"\u201csynchronization":[113,202],"mentality\u201d":[114],"construct":[116],"circuits;":[118],"2)":[119],"synchronization-like":[121],"verification":[122],"method":[123],"is":[124,178],"proposed":[125],"so":[129],"it":[131,195],"be":[133,158],"functionally":[134],"verified":[135],"before":[136],"synthesis.":[137],"Avoids":[138],"risk":[140],"rework":[142],"after":[143],"logic":[144],"defects":[145],"discovered":[147],"during":[148],"synthesis":[150],"implementation,":[152],"often":[156],"cannot":[157],"simulated":[159],"until":[160],"gate-level":[161],"(GL)":[162],"netlist":[163],"generation;":[164],"3)":[166],"whole":[168],"implementation":[169],"RTL":[172],"graphic":[174],"data":[175],"system":[176],"(GDS)":[177],"based":[179],"on":[180],"commercial":[181],"electronic":[182],"automation":[184],"(EDA)":[185],"tools.":[186],"Similar":[187],"implement":[198],"habits.\u201d":[203],"Furthermore,":[204],"validate":[206],"methodology,":[208],"two":[209],"processors":[211],"were,":[212],"respectively,":[213],"implemented":[214],"evaluated":[216],"TSMC":[219],"28-nm":[220],"CMOS":[221],"process.":[222],"Compared":[223],"their":[225],"counterparts,":[227],"general-purpose":[229],"RISC-V":[231],"processor":[232],"achieves":[233,246],"20.5%":[234],"savings.":[236],"And":[237],"domain-specific":[239],"spiking":[241],"neural":[242],"network":[243],"(SNN)":[244],"accelerator":[245],"58.46%":[247],"savings":[249],"<inline-formula":[251],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[252],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[253],"<tex-math":[254],"notation=\"LaTeX\">$2.41\\times":[255],"$":[256],"</tex-math></inline-formula>":[257],"energy":[258],"improvement":[260],"70%":[262],"input":[263],"spike":[264],"sparsity.":[265]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4}],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-10-10T00:00:00"}