{"id":"https://openalex.org/W4402039234","doi":"https://doi.org/10.1109/tvlsi.2024.3447903","title":"Power-Efficient Analog Hardware Architecture of the Learning Vector Quantization Algorithm for Brain Tumor Classification","display_name":"Power-Efficient Analog Hardware Architecture of the Learning Vector Quantization Algorithm for Brain Tumor Classification","publication_year":2024,"publication_date":"2024-08-30","ids":{"openalex":"https://openalex.org/W4402039234","doi":"https://doi.org/10.1109/tvlsi.2024.3447903"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2024.3447903","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3447903","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024524906","display_name":"Vassilis Alimisis","orcid":"https://orcid.org/0000-0002-2090-1493"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Vassilis Alimisis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece"],"raw_orcid":"https://orcid.org/0000-0002-2090-1493","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098938967","display_name":"Emmanouil Anastasios Serlis","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Emmanouil Anastasios Serlis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece"],"raw_orcid":"https://orcid.org/0009-0007-2553-5203","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111262402","display_name":"Andreas Papathanasiou","orcid":"https://orcid.org/0009-0003-0818-0050"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Andreas Papathanasiou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092886693","display_name":"Nikolaos P. Eleftheriou","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Nikolaos P. Eleftheriou","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece"],"raw_orcid":"https://orcid.org/0009-0002-7295-8886","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013213336","display_name":"Paul P. Sotiriadis","orcid":"https://orcid.org/0000-0001-6030-4645"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Paul P. Sotiriadis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece"],"raw_orcid":"https://orcid.org/0000-0001-6030-4645","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":5.8625,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.96637961,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"32","issue":"11","first_page":"1969","last_page":"1982"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12702","display_name":"Brain Tumor Detection and Classification","score":0.9794999957084656,"subfield":{"id":"https://openalex.org/subfields/2808","display_name":"Neurology"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},"topics":[{"id":"https://openalex.org/T12702","display_name":"Brain Tumor Detection and Classification","score":0.9794999957084656,"subfield":{"id":"https://openalex.org/subfields/2808","display_name":"Neurology"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/learning-vector-quantization","display_name":"Learning vector quantization","score":0.7077168822288513},{"id":"https://openalex.org/keywords/vector-quantization","display_name":"Vector quantization","score":0.6810899376869202},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.646852433681488},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.5833820700645447},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.49366673827171326},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4823400676250458},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.4731627106666565},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44183364510536194},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.425401508808136},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.41840681433677673},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4105582535266876},{"id":"https://openalex.org/keywords/pattern-recognition","display_name":"Pattern recognition (psychology)","score":0.34588271379470825},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09833785891532898},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.09547257423400879}],"concepts":[{"id":"https://openalex.org/C40567965","wikidata":"https://www.wikidata.org/wiki/Q1820283","display_name":"Learning vector quantization","level":3,"score":0.7077168822288513},{"id":"https://openalex.org/C199833920","wikidata":"https://www.wikidata.org/wiki/Q612536","display_name":"Vector quantization","level":2,"score":0.6810899376869202},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.646852433681488},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.5833820700645447},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.49366673827171326},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4823400676250458},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.4731627106666565},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44183364510536194},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.425401508808136},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.41840681433677673},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4105582535266876},{"id":"https://openalex.org/C153180895","wikidata":"https://www.wikidata.org/wiki/Q7148389","display_name":"Pattern recognition (psychology)","level":2,"score":0.34588271379470825},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09833785891532898},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.09547257423400879},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2024.3447903","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3447903","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6276162139","display_name":null,"funder_award_id":"MIS 5154714","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":51,"referenced_works":["https://openalex.org/W1512629291","https://openalex.org/W1979679474","https://openalex.org/W1990517717","https://openalex.org/W2000511987","https://openalex.org/W2003522442","https://openalex.org/W2014617390","https://openalex.org/W2035505403","https://openalex.org/W2042406155","https://openalex.org/W2048582057","https://openalex.org/W2054688485","https://openalex.org/W2086447159","https://openalex.org/W2098325783","https://openalex.org/W2113885918","https://openalex.org/W2120461003","https://openalex.org/W2120695048","https://openalex.org/W2123597802","https://openalex.org/W2124328182","https://openalex.org/W2126485331","https://openalex.org/W2139016795","https://openalex.org/W2140823559","https://openalex.org/W2153827622","https://openalex.org/W2174187647","https://openalex.org/W2346753755","https://openalex.org/W2621887673","https://openalex.org/W2765722795","https://openalex.org/W2791524226","https://openalex.org/W2896122000","https://openalex.org/W2897597575","https://openalex.org/W2910166072","https://openalex.org/W2911350556","https://openalex.org/W2920878483","https://openalex.org/W2942886292","https://openalex.org/W2955596007","https://openalex.org/W2956972896","https://openalex.org/W3004161400","https://openalex.org/W3012277039","https://openalex.org/W3043805104","https://openalex.org/W3049634967","https://openalex.org/W3158272724","https://openalex.org/W3160224578","https://openalex.org/W4205409270","https://openalex.org/W4243832265","https://openalex.org/W4246830294","https://openalex.org/W4284705734","https://openalex.org/W4287834747","https://openalex.org/W4313307392","https://openalex.org/W4313886731","https://openalex.org/W4367320920","https://openalex.org/W4384067832","https://openalex.org/W4387540226","https://openalex.org/W6777030826"],"related_works":["https://openalex.org/W2100968651","https://openalex.org/W4243803532","https://openalex.org/W2142248489","https://openalex.org/W2352648934","https://openalex.org/W4230688072","https://openalex.org/W1915693853","https://openalex.org/W1530525041","https://openalex.org/W2378212145","https://openalex.org/W2798892016","https://openalex.org/W2202992072"],"abstract_inverted_index":{"This":[0],"study":[1],"introduces":[2],"a":[3,76,85,96,112,130],"design":[4,152],"methodology":[5],"pertaining":[6],"to":[7],"analog":[8],"hardware":[9],"architecture":[10,67],"for":[11,123],"the":[12,15,32,55,58,66,119,145,148],"implementation":[13,92],"of":[14,23,51,65,133,147],"learning":[16],"vector":[17],"quantization":[18],"(LVQ)":[19],"algorithm.":[20],"It":[21],"consists":[22],"three":[24],"main":[25,48],"approaches":[26],"that":[27],"are":[28,54,68,109],"separated":[29],"based":[30],"on":[31,95],"distance":[33],"calculation":[34],"circuit":[35],"(DCC)":[36],"and,":[37],"more":[38,102],"specifically;":[39],"Euclidean":[40],"distance,":[41],"Sigmoid":[42],"function,":[43],"and":[44,57,71,116,126,142,151],"Squarer":[45],"circuits.":[46],"The":[47,62,107],"building":[49],"blocks":[50],"each":[52],"approach":[53],"DCC":[56],"current":[59],"comparator":[60],"(CC).":[61],"operational":[63],"principles":[64],"extensively":[69],"elucidated":[70],"put":[72],"into":[73],"practice":[74],"through":[75],"power-efficient":[77],"configuration":[78],"(operating":[79],"less":[80],"than":[81,103],"650":[82],"nW)":[83],"within":[84],"low-voltage":[86],"setup":[87],"(0.6":[88],"V).":[89],"Each":[90],"specific":[91],"is":[93,154],"tested":[94],"brain":[97],"tumor":[98],"classification":[99,105],"task":[100],"achieving":[101],"96.00%":[104],"accuracy.":[106],"designs":[108],"realized":[110],"using":[111],"90-nm":[113],"CMOS":[114],"process":[115],"developed":[117],"utilizing":[118],"Cadence":[120],"IC":[121],"Suite":[122],"both":[124],"schematic":[125],"physical":[127],"design.":[128],"Through":[129],"comparative":[131],"analysis":[132],"postlayout":[134],"simulation":[135],"outcomes":[136],"with":[137],"an":[138],"equivalent":[139],"software-based":[140],"classifier":[141],"related":[143],"works,":[144],"accuracy":[146],"applied":[149],"modeling":[150],"methodologies":[153],"validated.":[155]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":23},{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}