{"id":"https://openalex.org/W4392502246","doi":"https://doi.org/10.1109/tvlsi.2024.3368355","title":"Trade-Offs in Design of Wide-Band Inverter-Based Amplifiers","display_name":"Trade-Offs in Design of Wide-Band Inverter-Based Amplifiers","publication_year":2024,"publication_date":"2024-03-06","ids":{"openalex":"https://openalex.org/W4392502246","doi":"https://doi.org/10.1109/tvlsi.2024.3368355"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2024.3368355","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3368355","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077229297","display_name":"Behdad Jamadi","orcid":"https://orcid.org/0000-0003-0521-123X"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Behdad Jamadi","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Utah, Salt Lake City, UT, USA"],"raw_orcid":"https://orcid.org/0000-0003-0521-123X","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033562869","display_name":"Shiuh-Hua Wood Chiang","orcid":"https://orcid.org/0000-0001-8091-6569"},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shiuh-Hua Wood Chiang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA"],"raw_orcid":"https://orcid.org/0000-0001-8091-6569","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052867620","display_name":"Armin Tajalli","orcid":"https://orcid.org/0000-0002-0222-3561"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Armin Tajalli","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Utah, Salt Lake City, UT, USA"],"raw_orcid":"https://orcid.org/0000-0002-0222-3561","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Utah, Salt Lake City, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5077229297"],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":1.2017,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.77756396,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"32","issue":"7","first_page":"1364","last_page":"1368"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9004999995231628,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9004999995231628,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6024186611175537},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5939982533454895},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5072941184043884},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.4470234215259552},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.43661782145500183},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4314316511154175},{"id":"https://openalex.org/keywords/transistor-array","display_name":"Transistor array","score":0.4255511462688446},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30570805072784424},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2541757822036743},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.15379908680915833}],"concepts":[{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6024186611175537},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5939982533454895},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5072941184043884},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.4470234215259552},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.43661782145500183},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4314316511154175},{"id":"https://openalex.org/C170523978","wikidata":"https://www.wikidata.org/wiki/Q7834316","display_name":"Transistor array","level":4,"score":0.4255511462688446},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30570805072784424},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2541757822036743},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.15379908680915833}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2024.3368355","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3368355","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4402457685","display_name":null,"funder_award_id":"00065-2500-26420","funder_id":"https://openalex.org/F4320310050","funder_display_name":"University of Utah"}],"funders":[{"id":"https://openalex.org/F4320310050","display_name":"University of Utah","ror":"https://ror.org/03r0ha626"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W2003259124","https://openalex.org/W2034525900","https://openalex.org/W2121226030","https://openalex.org/W2142245099","https://openalex.org/W2167886319","https://openalex.org/W2758603753","https://openalex.org/W2809464985","https://openalex.org/W2921562438","https://openalex.org/W3002407668","https://openalex.org/W3028010688","https://openalex.org/W3044630899","https://openalex.org/W3047791943","https://openalex.org/W3088502779","https://openalex.org/W3098917284","https://openalex.org/W3135235705","https://openalex.org/W3160243467","https://openalex.org/W3180339043","https://openalex.org/W4210774621","https://openalex.org/W4213045967","https://openalex.org/W4285233448","https://openalex.org/W4292862684","https://openalex.org/W4313166934","https://openalex.org/W4313886962","https://openalex.org/W4319341983","https://openalex.org/W4385080057"],"related_works":["https://openalex.org/W2757589762","https://openalex.org/W2032596396","https://openalex.org/W2490724856","https://openalex.org/W994323718","https://openalex.org/W2022738546","https://openalex.org/W2157662201","https://openalex.org/W26247187","https://openalex.org/W38384472","https://openalex.org/W4239524903","https://openalex.org/W2002020084"],"abstract_inverted_index":{"Trade-offs":[0],"in":[1,103,137],"the":[2,17,28,36,112,132,144],"design":[3],"of":[4,32,49,106,114,126],"wideband":[5],"and":[6,14,35,40,65],"energy-efficient":[7],"inverter-based":[8],"amplifiers":[9],"(IAs)":[10],"will":[11,43,96],"be":[12,44,97,121],"analyzed":[13],"compared":[15,67,130],"to":[16,68,99,128,131],"conventional":[18],"Current-Mode":[19],"Logic":[20],"(CML)":[21],"based":[22],"circuits.":[23],"For":[24],"a":[25,47,73,80,124],"proper":[26],"comparison,":[27],"minimum":[29],"current":[30],"consumption":[31,113],"generic":[33],"IA":[34,115],"CML":[37,70,133],"amplifiers,":[38],"with":[39,88,93],"without":[41],"active-peaking,":[42],"calculated":[45],"for":[46,72],"set":[48],"target":[50],"Gain-Bandwidth":[51],"Product":[52],"(GBWP)":[53],"values.":[54],"This":[55,108],"study":[56,109],"shows":[57,110],"that":[58,111],"IAs":[59],"consume":[60],"not":[61],"only":[62],"lower":[63],"energy":[64],"power":[66],"their":[69],"counterparts":[71],"given":[74],"speed":[75],"specification,":[76],"but":[77],"also":[78],"offer":[79],"higher":[81],"maximum":[82,145],"achievable":[83,146],"operating":[84],"frequency.":[85],"Closed-form":[86],"expressions,":[87],"less":[89],"than":[90],"5%":[91],"mismatch":[92],"simulation":[94],"results,":[95],"provided":[98],"analyze":[100],"speed-power":[101],"trade-offs":[102],"this":[104],"type":[105],"circuit.":[107],"circuits":[116],"(with":[117,134],"active":[118,135],"peaking)":[119,136],"can":[120],"lowered":[122],"by":[123,148],"factor":[125],"close":[127],"two":[129],"CMOS":[138],"28":[139],"nm":[140],"technology,":[141],"while":[142],"extending":[143],"GBWP":[147],"about":[149],"12%.":[150]},"counts_by_year":[{"year":2025,"cited_by_count":6}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}