{"id":"https://openalex.org/W4393078684","doi":"https://doi.org/10.1109/tvlsi.2024.3360370","title":"Analyzing the Vulnerabilities of External SDRAM on System-on-Chip Field Programmable Gate Array Devices","display_name":"Analyzing the Vulnerabilities of External SDRAM on System-on-Chip Field Programmable Gate Array Devices","publication_year":2024,"publication_date":"2024-03-22","ids":{"openalex":"https://openalex.org/W4393078684","doi":"https://doi.org/10.1109/tvlsi.2024.3360370"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2024.3360370","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3360370","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056439817","display_name":"Alexandre Proulx","orcid":"https://orcid.org/0000-0002-7075-9632"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Alexandre Proulx","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0002-7075-9632","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089226328","display_name":"Jean\u2010Yves Chouinard","orcid":"https://orcid.org/0000-0002-7904-6137"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jean-Yves Chouinard","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0002-7904-6137","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053817761","display_name":"Amine Miled","orcid":"https://orcid.org/0000-0002-1766-7528"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Amine Miled","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0002-1766-7528","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada","institution_ids":["https://openalex.org/I43406934"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071953487","display_name":"Paul Fortier","orcid":"https://orcid.org/0000-0001-7368-9484"},"institutions":[{"id":"https://openalex.org/I43406934","display_name":"Universit\u00e9 Laval","ror":"https://ror.org/04sjchr03","country_code":"CA","type":"education","lineage":["https://openalex.org/I43406934"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Paul Fortier","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0001-7368-9484","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Laval University, Qu&#x00E9;bec City, QC, Canada","institution_ids":["https://openalex.org/I43406934"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.329,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.77980626,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"32","issue":"6","first_page":"1124","last_page":"1135"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.6355776786804199},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5915322303771973},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5833143591880798},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5736123919487},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5564186573028564},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5219528079032898},{"id":"https://openalex.org/keywords/macrocell-array","display_name":"Macrocell array","score":0.4944796562194824},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46120092272758484},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.41045185923576355},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3523256182670593},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.30235207080841064},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10774192214012146},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.10620290040969849}],"concepts":[{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.6355776786804199},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5915322303771973},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5833143591880798},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5736123919487},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5564186573028564},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5219528079032898},{"id":"https://openalex.org/C142278197","wikidata":"https://www.wikidata.org/wiki/Q4284934","display_name":"Macrocell array","level":5,"score":0.4944796562194824},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46120092272758484},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.41045185923576355},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3523256182670593},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.30235207080841064},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10774192214012146},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.10620290040969849},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2024.3360370","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2024.3360370","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1696527132","https://openalex.org/W2036329595","https://openalex.org/W2144163129","https://openalex.org/W2163563130","https://openalex.org/W2175377689","https://openalex.org/W2740097639","https://openalex.org/W2762071830","https://openalex.org/W2902570809","https://openalex.org/W3015685940","https://openalex.org/W3049030093","https://openalex.org/W3112733880","https://openalex.org/W3148657381","https://openalex.org/W4234716962","https://openalex.org/W4245276998","https://openalex.org/W4288100545","https://openalex.org/W6771327302"],"related_works":["https://openalex.org/W1966262200","https://openalex.org/W2014165129","https://openalex.org/W150753669","https://openalex.org/W2012014781","https://openalex.org/W2018518808","https://openalex.org/W4244547561","https://openalex.org/W4309935840","https://openalex.org/W2064975652","https://openalex.org/W2466591189","https://openalex.org/W2114921551"],"abstract_inverted_index":{"System-on-chip":[0],"(SoC)":[1],"field":[2],"programmable":[3],"gate":[4],"array":[5],"(FPGA)":[6],"devices":[7,36,45,67,161],"are":[8,46,56,68,128],"becoming":[9],"increasingly":[10,49],"prominent":[11],"in":[12,48,101,142],"a":[13,30],"vast":[14],"range":[15],"of":[16,20,59,82,113,158],"applications.":[17],"The":[18],"fusion":[19],"the":[21,78,111],"FPGA\u2019s":[22],"unmatched":[23],"parallel":[24],"computing":[25],"capacity":[26],"and":[27,54,73,80,87,155],"flexibility":[28],"with":[29,71,163],"full-bore":[31],"processing":[32],"system":[33],"makes":[34],"these":[35,64,66,97],"extremely":[37],"powerful.":[38],"With":[39],"recent":[40],"technological":[41],"progress,":[42],"SoC":[43,159],"FPGA":[44,160],"implemented":[47],"complex":[50],"systems":[51,127],"where":[52],"security":[53,112,166],"safety":[55],"often":[57],"issues":[58],"concern.":[60],"To":[61],"cater":[62],"to":[63,76,107,110,129,153],"concerns,":[65],"commonly":[69],"fit":[70],"encryption":[72],"authentication":[74],"capabilities":[75],"ensure":[77],"confidentiality":[79],"authenticity":[81],"externally":[83],"stored":[84,100,141],"bitstreams,":[85],"firmware,":[86],"bootloaders.":[88],"However,":[89],"while":[90],"much":[91],"effort":[92],"is":[93,118],"placed":[94],"into":[95],"securing":[96],"partitions":[98],"when":[99],"external":[102,143],"memory,":[103],"little":[104],"attention":[105],"seems":[106],"be":[108],"paid":[109],"this":[114],"data":[115,134,140],"once":[116],"it":[117],"decrypted":[119,133],"for":[120],"execution.":[121,136],"This":[122],"article":[123],"investigates":[124],"how":[125],"vulnerable":[126],"attacks":[130],"that":[131,139],"target":[132],"during":[135],"We":[137],"demonstrate":[138],"synchronous":[144],"dynamic":[145],"random":[146],"access":[147,152],"memory":[148],"(SDRAM)":[149],"can":[150],"provide":[151],"trusted":[154],"secured":[156],"interfaces":[157],"even":[162],"diligently":[164],"applied":[165],"features.":[167]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
