{"id":"https://openalex.org/W4389609833","doi":"https://doi.org/10.1109/tvlsi.2023.3337310","title":"IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks","display_name":"IOLock: An Input/Output Locking Scheme for Protection Against Reverse Engineering Attacks","publication_year":2023,"publication_date":"2023-12-12","ids":{"openalex":"https://openalex.org/W4389609833","doi":"https://doi.org/10.1109/tvlsi.2023.3337310"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2023.3337310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3337310","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075000110","display_name":"Christopher Vega","orcid":"https://orcid.org/0000-0002-0852-7937"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Christopher Vega","raw_affiliation_strings":["Department of Electrical Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0002-0852-7937","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075781704","display_name":"Patanjali SLPSK","orcid":"https://orcid.org/0000-0003-0754-2219"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Patanjali SLPSK","raw_affiliation_strings":["Department of Electrical Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0003-0754-2219","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039442844","display_name":"Swarup Bhunia","orcid":"https://orcid.org/0000-0001-6082-6961"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Swarup Bhunia","raw_affiliation_strings":["Department of Electrical Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0001-6082-6961","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.9222,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.74666667,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"32","issue":"2","first_page":"347","last_page":"360"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6756147742271423},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6406044363975525},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.6064447164535522},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5471616387367249},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.546003520488739},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5450236797332764},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4991297721862793},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.46311062574386597},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.43310976028442383},{"id":"https://openalex.org/keywords/reverse-engineering","display_name":"Reverse engineering","score":0.4271659255027771},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.36369433999061584},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11792504787445068},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08915331959724426}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6756147742271423},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6406044363975525},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.6064447164535522},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5471616387367249},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.546003520488739},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5450236797332764},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4991297721862793},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.46311062574386597},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.43310976028442383},{"id":"https://openalex.org/C207850805","wikidata":"https://www.wikidata.org/wiki/Q269608","display_name":"Reverse engineering","level":2,"score":0.4271659255027771},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.36369433999061584},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11792504787445068},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08915331959724426},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2023.3337310","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3337310","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":54,"referenced_works":["https://openalex.org/W1524250393","https://openalex.org/W1598916050","https://openalex.org/W2020617455","https://openalex.org/W2067276029","https://openalex.org/W2120912790","https://openalex.org/W2157661732","https://openalex.org/W2161998562","https://openalex.org/W2284252314","https://openalex.org/W2336864643","https://openalex.org/W2419784917","https://openalex.org/W2575241219","https://openalex.org/W2615010670","https://openalex.org/W2615060729","https://openalex.org/W2616325639","https://openalex.org/W2708742051","https://openalex.org/W2741711485","https://openalex.org/W2747980214","https://openalex.org/W2766393343","https://openalex.org/W2767162069","https://openalex.org/W2769463856","https://openalex.org/W2771999643","https://openalex.org/W2806992466","https://openalex.org/W2890973259","https://openalex.org/W2892708618","https://openalex.org/W2903329932","https://openalex.org/W2911567666","https://openalex.org/W2936537076","https://openalex.org/W2944647304","https://openalex.org/W2945852412","https://openalex.org/W2946593940","https://openalex.org/W2947480578","https://openalex.org/W2951156228","https://openalex.org/W2951325841","https://openalex.org/W2971591205","https://openalex.org/W2976174142","https://openalex.org/W2984653719","https://openalex.org/W2998291624","https://openalex.org/W3008907581","https://openalex.org/W3010730288","https://openalex.org/W3021869991","https://openalex.org/W3025215384","https://openalex.org/W3037353294","https://openalex.org/W3081524416","https://openalex.org/W3083084272","https://openalex.org/W3128999612","https://openalex.org/W3134828566","https://openalex.org/W3176852059","https://openalex.org/W3186792530","https://openalex.org/W4234875403","https://openalex.org/W4252100403","https://openalex.org/W4253112770","https://openalex.org/W6761424809","https://openalex.org/W6771327302","https://openalex.org/W6782531139"],"related_works":["https://openalex.org/W2363831530","https://openalex.org/W2363845219","https://openalex.org/W2385743990","https://openalex.org/W2381057835","https://openalex.org/W1789649838","https://openalex.org/W2051831113","https://openalex.org/W1984362519","https://openalex.org/W2350176425","https://openalex.org/W1499266877","https://openalex.org/W2362738525"],"abstract_inverted_index":{"Reverse":[0],"engineering":[1],"(RE)":[2],"of":[3,54,82,118,130,139,162,171,230],"hardware":[4,243],"designs":[5],"poses":[6],"a":[7,48,110,140,149,163,175,179],"significant":[8],"threat":[9],"to":[10,77,115,133,158,167,202,225],"the":[11,52,65,71,80,116,128,135,168,172,194,205,227,231,235],"modern":[12],"distributed":[13],"electronics":[14],"supply":[15],"chain.":[16],"RE":[17,44,255],"can":[18,103,154],"be":[19,104,213],"performed":[20],"at":[21,64,70,88,95,121],"both":[22,122,251],"chip":[23,66,89,123],"and":[24,68,91,124,242,253],"printed":[25],"circuit":[26],"board":[27,72,96,125],"(PCB)":[28],"levels":[29,126],"by":[30,177],"using":[31],"structural,":[32],"functional,":[33],"or":[34,218],"combined":[35],"analysis":[36],"techniques.":[37],"Recent":[38],"studies":[39,76],"on":[40,144],"artificial":[41],"intelligence":[42],"(AI)-inspired":[43],"techniques":[45],"have":[46,74],"seen":[47],"drastic":[49],"increase":[50],"in":[51,174,187,215,219],"effectiveness":[53],"such":[55],"attacks.":[56],"While":[57],"various":[58],"countermeasures,":[59],"e.g.,":[60],"logic":[61],"locking":[62,151],"(LL)":[63],"level":[67,90,97],"camouflaging":[69],"level,":[73],"been":[75],"combat":[78],"RE,":[79],"advent":[81],"Boolean":[83],"satisfiability":[84],"(SAT)-based":[85],"functional":[86],"query":[87],"3-D":[92],"imaging":[93],"attacks":[94,120,256],"has":[98],"shown":[99],"that":[100,109,113,185],"these":[101,119],"protections":[102],"easily":[105],"bypassed.":[106],"We":[107,233,245],"observe":[108,134],"common":[111],"factor":[112],"contributes":[114],"success":[117],"is":[127],"ability":[129],"an":[131],"attacker":[132],"input/output":[136],"(I/O)":[137],"patterns":[138],"working":[141,164],"system.":[142],"Based":[143],"this":[145],"observation,":[146],"we":[147],"present":[148],"novel":[150],"scheme":[152,224],"calledIOLockthat":[153],"effectively":[155],"prevent":[156],"access":[157,166],"golden":[159],"I/O":[160,195],"behavior":[161],"system.IOLockrestricts":[165],"actual":[169],"I/Os":[170],"chips":[173],"PCB":[176],"introducing":[178],"low-overhead":[180],"key":[181],"management":[182],"unit":[183],"(KMU)":[184],"works":[186],"conjunction":[188,220],"with":[189,204,221],"internal":[190],"encryption/decryption":[191,198],"modules":[192,199],"near":[193],"ports.":[196],"The":[197],"are":[200],"designed":[201],"work":[203],"existing":[206],"joint":[207],"test":[208],"action":[209],"group":[210],"(JTAG)":[211],"infrastructure.IOLockcan":[212],"used":[214],"standalone":[216],"mode":[217],"another":[222],"LL":[223],"enhance":[226],"overall":[228],"security":[229,236],"design.":[232],"evaluate":[234],"guarantees":[237],"offered":[238],"byIOLocktheoretically,":[239],"through":[240],"simulation,":[241],"measurements.":[244],"show":[246],"thatIOLockprovides":[247],"robust":[248],"protection":[249],"against":[250],"chip-level":[252],"PCB-level":[254],"while":[257],"incurring":[258],"minimal":[259],"design":[260],"overhead.":[261]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}