{"id":"https://openalex.org/W4387490112","doi":"https://doi.org/10.1109/tvlsi.2023.3321532","title":"Thermal-Aware Fixed-Outline 3-D IC Floorplanning: An End-to-End Learning-Based Approach","display_name":"Thermal-Aware Fixed-Outline 3-D IC Floorplanning: An End-to-End Learning-Based Approach","publication_year":2023,"publication_date":"2023-10-10","ids":{"openalex":"https://openalex.org/W4387490112","doi":"https://doi.org/10.1109/tvlsi.2023.3321532"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2023.3321532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3321532","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084608952","display_name":"Wenbo Guan","orcid":"https://orcid.org/0000-0002-2220-9847"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Wenbo Guan","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-2220-9847","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085339970","display_name":"Xiao-Yan Tang","orcid":"https://orcid.org/0000-0002-8222-2808"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyan Tang","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-8222-2808","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055887546","display_name":"Hongliang L\u00fc","orcid":"https://orcid.org/0000-0003-2726-4316"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongliang Lu","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0003-2726-4316","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100421237","display_name":"Yuming Zhang","orcid":"https://orcid.org/0000-0002-8587-0747"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuming Zhang","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-8587-0747","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045888183","display_name":"Yimen Zhang","orcid":"https://orcid.org/0000-0002-4887-735X"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yimen Zhang","raw_affiliation_strings":["School of Microelectronics, Xidian University, Xi&#x2019;an, China"],"raw_orcid":"https://orcid.org/0000-0002-4887-735X","affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5084608952"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":1.4053,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.81651078,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"31","issue":"12","first_page":"1882","last_page":"1895"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.9261693954467773},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5949840545654297},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.518863320350647},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.46428194642066956},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.44948136806488037},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4442433714866638},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4410712718963623},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.4406890273094177},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.43069350719451904},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4178253412246704},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2667381763458252},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19353067874908447},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.1855805218219757},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.09267085790634155}],"concepts":[{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.9261693954467773},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5949840545654297},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.518863320350647},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.46428194642066956},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.44948136806488037},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4442433714866638},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4410712718963623},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.4406890273094177},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.43069350719451904},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4178253412246704},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2667381763458252},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19353067874908447},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.1855805218219757},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.09267085790634155},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2023.3321532","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3321532","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/17","score":0.550000011920929,"display_name":"Partnerships for the goals"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W207727687","https://openalex.org/W1498436455","https://openalex.org/W1522301498","https://openalex.org/W1541633348","https://openalex.org/W1939710494","https://openalex.org/W1971507799","https://openalex.org/W2006749442","https://openalex.org/W2006980464","https://openalex.org/W2021517442","https://openalex.org/W2046376809","https://openalex.org/W2110798204","https://openalex.org/W2121863487","https://openalex.org/W2125653639","https://openalex.org/W2135685510","https://openalex.org/W2142760988","https://openalex.org/W2142838865","https://openalex.org/W2154462472","https://openalex.org/W2169189670","https://openalex.org/W2194775991","https://openalex.org/W2724714096","https://openalex.org/W2787938642","https://openalex.org/W2798405286","https://openalex.org/W2905224888","https://openalex.org/W2963562809","https://openalex.org/W2963864421","https://openalex.org/W2976212630","https://openalex.org/W2979093209","https://openalex.org/W3003658113","https://openalex.org/W3010672652","https://openalex.org/W3095180254","https://openalex.org/W3109579920","https://openalex.org/W3115480774","https://openalex.org/W3171752851","https://openalex.org/W3190609540","https://openalex.org/W3216969643","https://openalex.org/W4200341486","https://openalex.org/W4235066485","https://openalex.org/W4246839582","https://openalex.org/W4287597873","https://openalex.org/W6631190155","https://openalex.org/W6637242042","https://openalex.org/W6678589545","https://openalex.org/W6683204974","https://openalex.org/W6684205842","https://openalex.org/W6684921986","https://openalex.org/W6728550200","https://openalex.org/W6748839928","https://openalex.org/W6757096465","https://openalex.org/W6757374366","https://openalex.org/W6784984117"],"related_works":["https://openalex.org/W1965050610","https://openalex.org/W1990789187","https://openalex.org/W2994788014","https://openalex.org/W2809933636","https://openalex.org/W2005457717","https://openalex.org/W2074570708","https://openalex.org/W1541633348","https://openalex.org/W2942050196","https://openalex.org/W2144917103","https://openalex.org/W1595166940"],"abstract_inverted_index":{"High":[0],"temperature":[1,3,196,218],"and":[2,40,65,158,195,217],"nonuniformity":[4],"pose":[5],"significant":[6],"challenges":[7],"in":[8,20,36,167,177,197,213],"3-D":[9,21,86,198,210],"integrated":[10,54],"circuits":[11],"(3-D":[12],"ICs).":[13],"Numerous":[14],"studies":[15],"have":[16],"explored":[17],"thermal":[18,38],"issues":[19],"IC":[22,87,211],"floorplanning.":[23,88],"However,":[24],"most":[25],"existing":[26],"handcrafted":[27],"heuristic":[28],"algorithms":[29],"suffer":[30],"from":[31],"long":[32],"iteration":[33],"cycles,":[34],"resulting":[35],"inefficient":[37],"management":[39],"no":[41],"guarantee":[42],"of":[43,52,63,156,215],"optimal":[44],"performance.":[45],"In":[46,89,121],"addition,":[47],"with":[48,144],"the":[49,61,90,122,129,154,168,178,185,189],"increasing":[50],"complexity":[51],"modern":[53],"circuit":[55],"design,":[56],"current":[57],"floorplanning":[58,130],"techniques":[59],"encounter":[60],"\u201ccurse":[62],"dimensionality\u201d":[64],"struggle":[66],"to":[67,107,110,114,171],"optimize":[68,153],"large-scale":[69],"cases.":[70],"To":[71],"address":[72],"these":[73],"challenges,":[74],"this":[75],"article":[76],"proposes":[77],"a":[78,96,133,145],"novel":[79],"end-to-end":[80],"learning-based":[81],"approach":[82,206],"for":[83],"thermal-aware":[84],"fixed-outline":[85],"tier":[91],"assignment":[92,180],"stage,":[93,126,182],"we":[94,127,152,183],"utilize":[95],"deep":[97,147],"<inline-formula":[98],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[99],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[100],"<tex-math":[101],"notation=\"LaTeX\">${k}$":[102],"</tex-math></inline-formula>":[103],"-means":[104],"clustering":[105],"algorithm":[106],"allocate":[108],"modules":[109,157],"different":[111],"tiers,":[112],"aiming":[113],"achieve":[115],"an":[116,164],"improved":[117],"cross-tier":[118],"power":[119],"distribution.":[120],"global":[123],"distribution":[124],"(GD)":[125],"formulate":[128],"problem":[131],"as":[132],"Markov":[134],"decision":[135],"process":[136],"(MDP).":[137],"By":[138],"combining":[139],"graph":[140],"convolutional":[141],"networks":[142],"(GCNs)":[143],"multiagent":[146],"reinforcement":[148],"learning":[149],"(MADRL)":[150],"algorithm,":[151,191],"positions":[155,187],"through-silicon":[159],"vias":[160],"(TSVs),":[161],"while":[162],"incorporating":[163],"attention":[165],"mechanism":[166],"centralized":[169],"critic":[170],"enhance":[172],"cooperation":[173],"among":[174],"agents.":[175],"Finally,":[176],"TSV":[179,186],"(TA)":[181],"refine":[184],"using":[188],"MADRL":[190],"further":[192],"reducing":[193],"wirelength":[194,216],"ICs.":[199],"Experimental":[200],"results":[201],"demonstrate":[202],"that":[203],"our":[204],"proposed":[205],"outperforms":[207],"state-of-the-art":[208],"heuristic-based":[209],"floorplanner":[212],"terms":[214],"optimization.":[219]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":4}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}