{"id":"https://openalex.org/W4388754174","doi":"https://doi.org/10.1109/tvlsi.2023.3305597","title":"FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter","display_name":"FPGA Crystal Oscillator Circuit Emulation Based on Wave Digital Filter","publication_year":2023,"publication_date":"2023-11-17","ids":{"openalex":"https://openalex.org/W4388754174","doi":"https://doi.org/10.1109/tvlsi.2023.3305597"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2023.3305597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3305597","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061966531","display_name":"Abdulaziz Alshaya","orcid":"https://orcid.org/0000-0002-5469-1594"},"institutions":[{"id":"https://openalex.org/I1321296531","display_name":"National Institute of Standards and Technology","ror":"https://ror.org/05xpvk416","country_code":"US","type":"funder","lineage":["https://openalex.org/I1321296531","https://openalex.org/I1343035065"]},{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Abdulaziz Alshaya","raw_affiliation_strings":["Electrical and Electronics Engineering Department, Imperial College London, London, U.K","National Institute of Standards and Technology, Boulder, CO 80305 USA"],"raw_orcid":"https://orcid.org/0000-0002-5469-1594","affiliations":[{"raw_affiliation_string":"Electrical and Electronics Engineering Department, Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]},{"raw_affiliation_string":"National Institute of Standards and Technology, Boulder, CO 80305 USA","institution_ids":["https://openalex.org/I1321296531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025807083","display_name":"Sudhakar Pamarti","orcid":"https://orcid.org/0000-0003-1457-7508"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudhakar Pamarti","raw_affiliation_strings":["Electrical Engineering Department, University of California Los Angeles, Los Angeles, CA, USA"],"raw_orcid":"https://orcid.org/0000-0003-1457-7508","affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, University of California Los Angeles, Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048618563","display_name":"Christos Papavassiliou","orcid":"https://orcid.org/0000-0002-8003-2146"},"institutions":[{"id":"https://openalex.org/I1321296531","display_name":"National Institute of Standards and Technology","ror":"https://ror.org/05xpvk416","country_code":"US","type":"funder","lineage":["https://openalex.org/I1321296531","https://openalex.org/I1343035065"]},{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Christos Papavassiliou","raw_affiliation_strings":["Electrical and Electronics Engineering Department, Imperial College London, London, U.K","National Institute of Standards and Technology, Boulder, CO 80305 USA"],"raw_orcid":"https://orcid.org/0000-0002-8003-2146","affiliations":[{"raw_affiliation_string":"Electrical and Electronics Engineering Department, Imperial College London, London, U.K","institution_ids":["https://openalex.org/I47508984"]},{"raw_affiliation_string":"National Institute of Standards and Technology, Boulder, CO 80305 USA","institution_ids":["https://openalex.org/I1321296531"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0972,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.39979816,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"32","issue":"1","first_page":"103","last_page":"115"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9932000041007996,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10369","display_name":"Advanced MEMS and NEMS Technologies","score":0.9836000204086304,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.7267423868179321},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6532120108604431},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6451936960220337},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5806809067726135},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5062348246574402},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.44273698329925537},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4402335286140442},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4243239164352417},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21973031759262085}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.7267423868179321},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6532120108604431},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6451936960220337},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5806809067726135},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5062348246574402},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.44273698329925537},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4402335286140442},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4243239164352417},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21973031759262085},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tvlsi.2023.3305597","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2023.3305597","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:spiral.imperial.ac.uk:10044/1/106076","is_oa":false,"landing_page_url":"http://hdl.handle.net/10044/1/106076","pdf_url":null,"source":{"id":"https://openalex.org/S4306401396","display_name":"Spiral (Imperial College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I47508984","host_organization_name":"Imperial College London","host_organization_lineage":["https://openalex.org/I47508984"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"115","raw_type":"Journal Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320322997","display_name":"King Abdulaziz City for Science and Technology","ror":"https://ror.org/05tdz6m39"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":51,"referenced_works":["https://openalex.org/W229187307","https://openalex.org/W624123189","https://openalex.org/W1547850816","https://openalex.org/W1972224869","https://openalex.org/W1972580129","https://openalex.org/W1977246873","https://openalex.org/W1983722771","https://openalex.org/W2006659169","https://openalex.org/W2028682231","https://openalex.org/W2038078811","https://openalex.org/W2049595452","https://openalex.org/W2050243129","https://openalex.org/W2078134459","https://openalex.org/W2098988753","https://openalex.org/W2106277928","https://openalex.org/W2127201524","https://openalex.org/W2132450860","https://openalex.org/W2139410061","https://openalex.org/W2147630201","https://openalex.org/W2514207389","https://openalex.org/W2582846960","https://openalex.org/W2585294117","https://openalex.org/W2664750394","https://openalex.org/W2734492219","https://openalex.org/W2763355544","https://openalex.org/W2767018634","https://openalex.org/W2804369639","https://openalex.org/W2807477320","https://openalex.org/W2888567646","https://openalex.org/W2913504865","https://openalex.org/W2964388437","https://openalex.org/W2999291210","https://openalex.org/W3045972127","https://openalex.org/W3113993520","https://openalex.org/W3117028443","https://openalex.org/W3170685640","https://openalex.org/W3195205352","https://openalex.org/W3199216412","https://openalex.org/W3200262911","https://openalex.org/W3203011645","https://openalex.org/W3203132159","https://openalex.org/W3209424871","https://openalex.org/W3212586202","https://openalex.org/W4241975644","https://openalex.org/W4242911037","https://openalex.org/W4248288458","https://openalex.org/W4256199352","https://openalex.org/W4294175737","https://openalex.org/W4312480111","https://openalex.org/W6634325903","https://openalex.org/W6737768058"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2155289750","https://openalex.org/W2103996454","https://openalex.org/W3029775214","https://openalex.org/W2390650884","https://openalex.org/W2093057572","https://openalex.org/W2129151116","https://openalex.org/W2110651346","https://openalex.org/W231899216","https://openalex.org/W2416897075"],"abstract_inverted_index":{"The":[0,93,118,140],"design":[1],"cycle":[2],"of":[3,40,95,106],"analog":[4,16,33],"and":[5,20],"mixed":[6],"signal":[7],"(AMS)":[8],"components":[9,48],"requires":[10,131],"the":[11,77,104,107,115],"designer":[12],"to":[13,37,45,135],"iteratively":[14],"perform":[15],"simulations,":[17],"layout,":[18],"fabrication,":[19],"hardware":[21,51,97],"testing.":[22],"Unlike":[23],"digital":[24,50,79],"designs,":[25,34],"system":[26],"verification":[27],"is":[28,65],"a":[29,38,43,59,68,85,124,137,144,155],"difficult":[30],"task":[31],"in":[32],"primarily":[35],"due":[36],"lack":[39],"emulation.":[41],"Thus,":[42],"method":[44],"emulate":[46],"AMS":[47],"on":[49,67,151],"would":[52],"be":[53],"highly":[54],"beneficial.":[55],"In":[56],"this":[57],"work,":[58],"high-quality":[60],"factor":[61],"crystal":[62],"oscillator":[63],"circuit":[64],"implemented":[66],"Xilinx":[69],"Vertex":[70],"7":[71],"field-programmable":[72],"gate":[73],"array":[74],"(FPGA)":[75],"using":[76],"wave":[78],"filter":[80],"(WDF)":[81],"based":[82],"model":[83,120],"with":[84,114,123,154],"nonlinear":[86],"lookup":[87],"table":[88],"for":[89],"modeling":[90],"transistor":[91],"characteristics.":[92],"number":[94],"required":[96],"resources":[98],"was":[99,121],"minimized":[100],"while":[101,149],"ensuring":[102],"that":[103,128],"accuracy":[105],"emulation":[108,142],"shows":[109],"an":[110,152],"almost":[111],"perfect":[112],"match":[113],"SPICE":[116],"simulations.":[117],"WDF":[119],"designed":[122],"tree":[125],"structure":[126],"so":[127],"it":[129],"only":[130],"32":[132],"clock":[133],"cycles":[134],"compute":[136],"complete":[138],"sample.":[139],"resulting":[141],"computes":[143],"sample":[145],"at":[146],"18.75":[147],"MHz":[148,157],"running":[150],"FPGA":[153],"600":[156],"clock.":[158]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
