{"id":"https://openalex.org/W4312441314","doi":"https://doi.org/10.1109/tvlsi.2022.3224582","title":"Hardware\u2013Software Co-Design of Statistical and Deep-Learning Frameworks for Wideband Sensing on Zynq System on Chip","display_name":"Hardware\u2013Software Co-Design of Statistical and Deep-Learning Frameworks for Wideband Sensing on Zynq System on Chip","publication_year":2022,"publication_date":"2022-11-30","ids":{"openalex":"https://openalex.org/W4312441314","doi":"https://doi.org/10.1109/tvlsi.2022.3224582"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3224582","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3224582","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032830201","display_name":"Rohith Rajesh","orcid":null},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rohith Rajesh","raw_affiliation_strings":["Electronics and Communications Department, IIIT-Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, IIIT-Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084951491","display_name":"Sumit J. Darak","orcid":"https://orcid.org/0000-0001-8656-4533"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sumit J. Darak","raw_affiliation_strings":["Electronics and Communications Department, IIIT-Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0000-0001-8656-4533","affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, IIIT-Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102813415","display_name":"Akshay Jain","orcid":"https://orcid.org/0000-0003-0243-9810"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Akshay Jain","raw_affiliation_strings":["Electronics and Communications Department, IIIT-Delhi, New Delhi, India","AMD, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, IIIT-Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]},{"raw_affiliation_string":"AMD, Hyderabad, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013255070","display_name":"Shivam Chandhok","orcid":null},"institutions":[{"id":"https://openalex.org/I1326498283","display_name":"Institut national de recherche en sciences et technologies du num\u00e9rique","ror":"https://ror.org/02kvxyf05","country_code":"FR","type":"government","lineage":["https://openalex.org/I1326498283"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Shivam Chandhok","raw_affiliation_strings":["INRIA, Universite Grenoble Alpes, Grenoble, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"INRIA, Universite Grenoble Alpes, Grenoble, France","institution_ids":["https://openalex.org/I899635006","https://openalex.org/I1326498283"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103154401","display_name":"Animesh Sharma","orcid":"https://orcid.org/0000-0002-7814-7462"},"institutions":[{"id":"https://openalex.org/I119939252","display_name":"Indraprastha Institute of Information Technology Delhi","ror":"https://ror.org/03vfp4g33","country_code":"IN","type":"education","lineage":["https://openalex.org/I119939252"]},{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Animesh Sharma","raw_affiliation_strings":["Electronics and Communications Department, IIIT-Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Communications Department, IIIT-Delhi, New Delhi, India","institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5032830201"],"corresponding_institution_ids":["https://openalex.org/I119939252","https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":1.4952,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.79331372,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"31","issue":"1","first_page":"79","last_page":"89"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10500","display_name":"Sparse and Compressive Sensing Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10500","display_name":"Sparse and Compressive Sensing Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11447","display_name":"Blind Source Separation Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.781774640083313},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.607714056968689},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5644054412841797},{"id":"https://openalex.org/keywords/compressed-sensing","display_name":"Compressed sensing","score":0.5415561199188232},{"id":"https://openalex.org/keywords/matching-pursuit","display_name":"Matching pursuit","score":0.5172884464263916},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4930996596813202},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46456021070480347},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.4156442880630493},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4092152714729309},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3815804719924927},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3299013376235962},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2116294503211975},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.18658003211021423},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09486374258995056}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.781774640083313},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.607714056968689},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5644054412841797},{"id":"https://openalex.org/C124851039","wikidata":"https://www.wikidata.org/wiki/Q2665459","display_name":"Compressed sensing","level":2,"score":0.5415561199188232},{"id":"https://openalex.org/C156872377","wikidata":"https://www.wikidata.org/wiki/Q6786281","display_name":"Matching pursuit","level":3,"score":0.5172884464263916},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4930996596813202},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46456021070480347},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.4156442880630493},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4092152714729309},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3815804719924927},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3299013376235962},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2116294503211975},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.18658003211021423},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09486374258995056},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3224582","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3224582","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320334771","display_name":"Science and Engineering Research Board","ror":"https://ror.org/03ffdsr55"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1857867064","https://openalex.org/W1971130674","https://openalex.org/W2078892792","https://openalex.org/W2094755917","https://openalex.org/W2122752988","https://openalex.org/W2128659236","https://openalex.org/W2139961842","https://openalex.org/W2140856955","https://openalex.org/W2149406951","https://openalex.org/W2160122636","https://openalex.org/W2324940416","https://openalex.org/W2343448572","https://openalex.org/W2471640506","https://openalex.org/W2551956255","https://openalex.org/W2565125333","https://openalex.org/W2766845249","https://openalex.org/W2810015341","https://openalex.org/W2895059999","https://openalex.org/W2902160182","https://openalex.org/W2905459276","https://openalex.org/W2946598042","https://openalex.org/W2962861956","https://openalex.org/W2963609486","https://openalex.org/W2964011032","https://openalex.org/W2998755892","https://openalex.org/W3009448587","https://openalex.org/W3130196042","https://openalex.org/W3133299057","https://openalex.org/W3140077234","https://openalex.org/W3175878110","https://openalex.org/W3198599344","https://openalex.org/W3210985006","https://openalex.org/W4241572510","https://openalex.org/W4287279045"],"related_works":["https://openalex.org/W2098521117","https://openalex.org/W2465351041","https://openalex.org/W4385694579","https://openalex.org/W2340242818","https://openalex.org/W4300881421","https://openalex.org/W2103001330","https://openalex.org/W4319793311","https://openalex.org/W2241396314","https://openalex.org/W2262109992","https://openalex.org/W2012574959"],"abstract_inverted_index":{"With":[0],"the":[1,12,18,23,28,62,88,92,139,153],"introduction":[2],"of":[3,82,97,123,152,185],"spectrum":[4,20,24,42,58,124],"sharing":[5],"and":[6,21,31,101,134,164,173,181],"heterogeneous":[7],"services":[8],"in":[9,74,112],"next-generation":[10],"networks,":[11],"base":[13],"stations":[14],"need":[15],"to":[16,26],"sense":[17],"wideband":[19,41],"identify":[22],"resources":[25],"meet":[27],"quality-of-service,":[29],"bandwidth,":[30],"latency":[32],"constraints.":[33],"Sub-Nyquist":[34],"sampling":[35],"(SNS)":[36],"enables":[37],"digitization":[38],"for":[39,57,115,177,191],"sparse":[40,116],"without":[43],"needing":[44],"Nyquist":[45],"speed":[46],"analog-to-digital":[47],"converters":[48],"(ADCs).":[49],"However,":[50],"SNS":[51],"demands":[52],"additional":[53],"signal":[54],"processing":[55],"algorithms":[56],"reconstruction,":[59],"such":[60],"as":[61,142],"well-known":[63],"orthogonal":[64],"matching":[65],"pursuit":[66],"(OMP)":[67],"algorithm.":[68],"OMP":[69,89,113,119],"is":[70,85],"also":[71],"widely":[72],"used":[73],"other":[75],"compressed":[76],"sensing":[77],"applications.":[78],"The":[79,170],"first":[80],"contribution":[81],"this":[83],"work":[84],"efficiently":[86,135],"mapping":[87],"algorithm":[90],"on":[91,138],"Zynq":[93],"system-on-chip":[94],"(ZSoC)":[95],"consisting":[96],"an":[98],"ARM":[99],"processor":[100],"field-programmable":[102],"gate":[103],"array":[104],"(FPGA).":[105],"Experimental":[106],"analysis":[107],"shows":[108],"a":[109,143,182],"significant":[110],"degradation":[111],"performance":[114],"spectrum.":[117],"Also,":[118],"needs":[120],"prior":[121],"knowledge":[122],"sparsity.":[125],"We":[126],"address":[127],"these":[128,192],"challenges":[129],"via":[130],"deep-learning":[131],"(DL)-based":[132],"architectures":[133],"map":[136],"them":[137],"ZSoC":[140],"platform":[141],"second":[144],"contribution.":[145],"Via":[146],"hardware\u2013software":[147],"codesign":[148],"(HSCD),":[149],"different":[150],"versions":[151],"proposed":[154],"architecture":[155],"obtained":[156],"by":[157],"partitioning":[158],"between":[159],"software":[160],"(SW)":[161],"(ARM":[162],"processor)":[163],"hardware":[165],"(HW)":[166],"(FPGA)":[167],"are":[168,189],"considered.":[169],"resource,":[171],"power,":[172],"execution":[174],"time":[175],"comparisons":[176],"given":[178],"memory":[179],"constraints":[180],"wide":[183],"range":[184],"word":[186],"lengths":[187],"(WLs)":[188],"presented":[190],"architectures.":[193]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-23T05:10:03.516525","created_date":"2025-10-10T00:00:00"}
