{"id":"https://openalex.org/W4312576493","doi":"https://doi.org/10.1109/tvlsi.2022.3214793","title":"A Robust Integrated Power Delivery Methodology for 3-D ICs","display_name":"A Robust Integrated Power Delivery Methodology for 3-D ICs","publication_year":2022,"publication_date":"2022-11-03","ids":{"openalex":"https://openalex.org/W4312576493","doi":"https://doi.org/10.1109/tvlsi.2022.3214793"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3214793","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3214793","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088527176","display_name":"Yousef Safari","orcid":"https://orcid.org/0000-0002-8352-2538"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Yousef Safari","raw_affiliation_strings":["Electrical and Computer Engineering Department, Heterogeneous Integration Knowledge (THInK) Team, McGill University, Montreal, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0002-8352-2538","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Heterogeneous Integration Knowledge (THInK) Team, McGill University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064794690","display_name":"Boris Vaisband","orcid":"https://orcid.org/0000-0002-6176-5918"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Boris Vaisband","raw_affiliation_strings":["Electrical and Computer Engineering Department, Heterogeneous Integration Knowledge (THInK) Team, McGill University, Montreal, QC, Canada"],"raw_orcid":"https://orcid.org/0000-0002-6176-5918","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Heterogeneous Integration Knowledge (THInK) Team, McGill University, Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088527176"],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":1.3855,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.80783517,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":98},"biblio":{"volume":"31","issue":"3","first_page":"287","last_page":"295"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9912999868392944,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9843000173568726,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/notation","display_name":"Notation","score":0.5250763297080994},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5082804560661316},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4907570779323578},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4316239655017853},{"id":"https://openalex.org/keywords/dimension","display_name":"Dimension (graph theory)","score":0.4270396828651428},{"id":"https://openalex.org/keywords/power-domains","display_name":"Power domains","score":0.4256308674812317},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3539047837257385},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3421728014945984},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3392837643623352},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.29216673970222473},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2743901014328003},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25232574343681335},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12403598427772522},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.08491677045822144}],"concepts":[{"id":"https://openalex.org/C45357846","wikidata":"https://www.wikidata.org/wiki/Q2001982","display_name":"Notation","level":2,"score":0.5250763297080994},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5082804560661316},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4907570779323578},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4316239655017853},{"id":"https://openalex.org/C33676613","wikidata":"https://www.wikidata.org/wiki/Q13415176","display_name":"Dimension (graph theory)","level":2,"score":0.4270396828651428},{"id":"https://openalex.org/C16021271","wikidata":"https://www.wikidata.org/wiki/Q17152552","display_name":"Power domains","level":3,"score":0.4256308674812317},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3539047837257385},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3421728014945984},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3392837643623352},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.29216673970222473},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2743901014328003},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25232574343681335},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12403598427772522},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.08491677045822144},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3214793","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3214793","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.41999998688697815,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1348248984","display_name":null,"funder_award_id":"RGPIN-2021-02778","funder_id":"https://openalex.org/F4320334593","funder_display_name":"Natural Sciences and Engineering Research Council of Canada"},{"id":"https://openalex.org/G6092206038","display_name":null,"funder_award_id":"2022-NC-300132","funder_id":"https://openalex.org/F4320331165","funder_display_name":"Fonds de recherche du Qu\u00e9bec"}],"funders":[{"id":"https://openalex.org/F4320331165","display_name":"Fonds de recherche du Qu\u00e9bec","ror":"https://ror.org/00w3qhf76"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W185612124","https://openalex.org/W327832574","https://openalex.org/W1636189610","https://openalex.org/W1990884219","https://openalex.org/W2005442397","https://openalex.org/W2008418455","https://openalex.org/W2046574526","https://openalex.org/W2053920414","https://openalex.org/W2067148615","https://openalex.org/W2072772527","https://openalex.org/W2115765555","https://openalex.org/W2127807526","https://openalex.org/W2149809112","https://openalex.org/W2155707315","https://openalex.org/W2157444974","https://openalex.org/W2161803106","https://openalex.org/W2163569300","https://openalex.org/W2169704026","https://openalex.org/W2200279179","https://openalex.org/W2481508967","https://openalex.org/W2482450555","https://openalex.org/W2564353128","https://openalex.org/W2593999461","https://openalex.org/W2744153469","https://openalex.org/W2744983522","https://openalex.org/W2800822222","https://openalex.org/W3015690986","https://openalex.org/W3135920459","https://openalex.org/W3199229526","https://openalex.org/W4212833482","https://openalex.org/W4243626423","https://openalex.org/W4283710572","https://openalex.org/W6679182518","https://openalex.org/W6728469656","https://openalex.org/W6800836461"],"related_works":["https://openalex.org/W2504004674","https://openalex.org/W1595229445","https://openalex.org/W2498744856","https://openalex.org/W4390482104","https://openalex.org/W322408318","https://openalex.org/W149041114","https://openalex.org/W2963177394","https://openalex.org/W1965815883","https://openalex.org/W4313359513","https://openalex.org/W763418848"],"abstract_inverted_index":{"The":[0,172],"inherent":[1],"advantages":[2],"of":[3,18,25,29,43,77,92,147,150,159],"three-dimensional":[4],"(3-D)":[5],"integrated":[6,63,79],"circuits":[7],"(ICs)":[8],"are":[9,96,125,211],"well-aligned":[10],"with":[11],"the":[12,22,41,54,75,83,89,93,114,122,145,168,214],"continuous":[13],"demand":[14],"for":[15,110],"increased":[16],"density":[17],"functionality,":[19],"reduced":[20],"latency,":[21],"power":[23,33,55,64,107,128,133,153,169,180,208,222],"dissipation":[24],"communication,":[26],"and":[27,82,105,130,154,164,183,193,207,217,224],"heterogeneity":[28],"modern":[30],"applications.":[31],"Delivering":[32],"efficiently":[34],"to":[35,101,127,143,162,177,213,221],"highly":[36],"heterogeneous":[37],"voltage":[38,160,165,205],"domains":[39,161],"across":[40,167],"tiers":[42],"a":[44,49,61],"3-D":[45,59,94,111,123],"IC":[46],"is,":[47],"however,":[48],"significant":[50],"challenge.":[51],"To":[52],"address":[53],"delivery":[56,65,108,170,181],"challenge":[57],"in":[58,69,74,88,98,226],"ICs,":[60],"robust":[62,106],"methodology":[66,174],"is":[67,86,140,175],"proposed":[68,115,173],"this":[70,99],"article.":[71],"Recent":[72],"advancements":[73],"fabrication":[76],"high-density":[78],"passive":[80],"components,":[81],"area":[84,219],"that":[85],"available":[87],"vertical":[90],"dimension":[91],"construct,":[95],"exploited":[97],"work":[100],"enable":[102],"an":[103],"efficient":[104],"system":[109],"ICs.":[112],"In":[113],"approach,":[116],"one":[117],"or":[118],"more":[119],"layers":[120,134,156],"within":[121],"structure":[124],"dedicated":[126,220],"conversion":[129,223],"regulation,":[131],"namely,":[132],"(PLs).":[135],"A":[136],"design":[137],"exploration":[138],"stage":[139],"also":[141],"provided":[142],"determine":[144],"number":[146],"PLs,":[148,163],"distribution":[149],"resources":[151],"between":[152],"functional":[155],"(FLs),":[157],"assignment":[158],"levels":[166],"system.":[171],"compared":[176],"three":[178],"other":[179],"topologies":[182],"exhibits":[184],"1.4\u2013":[185,194],"<inline-formula":[186,195],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[187,196],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[188,197],"<tex-math":[189,198],"notation=\"LaTeX\">$38\\times":[190],"$":[191,200],"</tex-math></inline-formula>":[192,201],"notation=\"LaTeX\">$7.1\\times":[199],"improvement":[202],"in,":[203],"respectively,":[204],"drop":[206],"efficiency.":[209],"Results":[210],"normalized":[212],"total":[215],"on-":[216],"off-chip":[218],"regulation":[225],"each":[227],"topology.":[228]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}