{"id":"https://openalex.org/W4313467236","doi":"https://doi.org/10.1109/tvlsi.2022.3214724","title":"A Twofold Clock and Voltage-Based Detection Method for Laser Logic State Imaging Attack","display_name":"A Twofold Clock and Voltage-Based Detection Method for Laser Logic State Imaging Attack","publication_year":2022,"publication_date":"2022-11-03","ids":{"openalex":"https://openalex.org/W4313467236","doi":"https://doi.org/10.1109/tvlsi.2022.3214724"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3214724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3214724","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027003944","display_name":"Tasnuva Farheen","orcid":"https://orcid.org/0000-0002-2057-7435"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tasnuva Farheen","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0002-2057-7435","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084689736","display_name":"Sourav Roy","orcid":"https://orcid.org/0009-0006-0461-6533"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sourav Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002624062","display_name":"Shahin Tajik","orcid":"https://orcid.org/0000-0003-3752-2358"},"institutions":[{"id":"https://openalex.org/I107077323","display_name":"Worcester Polytechnic Institute","ror":"https://ror.org/05ejpqr48","country_code":"US","type":"education","lineage":["https://openalex.org/I107077323"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shahin Tajik","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Worcester Polytechnic Institute, Worcester, MA, USA"],"raw_orcid":"https://orcid.org/0000-0003-3752-2358","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Worcester Polytechnic Institute, Worcester, MA, USA","institution_ids":["https://openalex.org/I107077323"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009243659","display_name":"Domenic Forte","orcid":"https://orcid.org/0000-0002-2794-7320"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Domenic Forte","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0002-2794-7320","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5027003944"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.9237,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.73798909,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"31","issue":"1","first_page":"65","last_page":"78"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9842000007629395,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.618864119052887},{"id":"https://openalex.org/keywords/countermeasure","display_name":"Countermeasure","score":0.5415071249008179},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.5274094343185425},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.45840388536453247},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4559735059738159},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44967252016067505},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.42993253469467163},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4298892915248871},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.42888760566711426},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4151514768600464},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4128572344779968},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3741554021835327},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36254507303237915},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30576860904693604},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.18113431334495544},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.1544678807258606}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.618864119052887},{"id":"https://openalex.org/C21593369","wikidata":"https://www.wikidata.org/wiki/Q1032176","display_name":"Countermeasure","level":2,"score":0.5415071249008179},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.5274094343185425},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.45840388536453247},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4559735059738159},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44967252016067505},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.42993253469467163},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4298892915248871},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.42888760566711426},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4151514768600464},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4128572344779968},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3741554021835327},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36254507303237915},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30576860904693604},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.18113431334495544},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.1544678807258606},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3214724","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3214724","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G155498796","display_name":null,"funder_award_id":"2117349","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G1895130331","display_name":null,"funder_award_id":"W9124P-18-9-0001","funder_id":"https://openalex.org/F4320338311","funder_display_name":"Aviation and Missile Research, Development, and Engineering Center"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320338311","display_name":"Aviation and Missile Research, Development, and Engineering Center","ror":"https://ror.org/02rdkx920"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W191000419","https://openalex.org/W1565273324","https://openalex.org/W1631035314","https://openalex.org/W1772067890","https://openalex.org/W1896747771","https://openalex.org/W1897761346","https://openalex.org/W1945000243","https://openalex.org/W1984267701","https://openalex.org/W2002584218","https://openalex.org/W2032972350","https://openalex.org/W2071212292","https://openalex.org/W2076611807","https://openalex.org/W2095526927","https://openalex.org/W2115402073","https://openalex.org/W2128110715","https://openalex.org/W2153843906","https://openalex.org/W2154909745","https://openalex.org/W2155441237","https://openalex.org/W2479752304","https://openalex.org/W2520282831","https://openalex.org/W2535614716","https://openalex.org/W2738836551","https://openalex.org/W2759415793","https://openalex.org/W2766071343","https://openalex.org/W2808601176","https://openalex.org/W2891421382","https://openalex.org/W2924330928","https://openalex.org/W2945668709","https://openalex.org/W2949797438","https://openalex.org/W2984427922","https://openalex.org/W3006913805","https://openalex.org/W3034798340","https://openalex.org/W3106438694","https://openalex.org/W3109460042","https://openalex.org/W3125849507","https://openalex.org/W3152552921","https://openalex.org/W4241106279","https://openalex.org/W4283689414","https://openalex.org/W4288072562","https://openalex.org/W6659374400","https://openalex.org/W6765819026","https://openalex.org/W6790418948"],"related_works":["https://openalex.org/W2378749186","https://openalex.org/W2364088131","https://openalex.org/W2362741838","https://openalex.org/W622044715","https://openalex.org/W2378994067","https://openalex.org/W2347979151","https://openalex.org/W2366397149","https://openalex.org/W2350213425","https://openalex.org/W2121017442","https://openalex.org/W1790664656"],"abstract_inverted_index":{"Powerful":[0],"side-channel":[1],"analysis":[2,8],"(SCA)":[3],"attacks":[4,181],"based":[5],"on":[6,15,76],"failure":[7],"(FA)":[9],"techniques":[10],"can":[11,178],"bypass":[12],"conventional":[13],"countermeasures":[14,51],"integrated":[16],"circuits":[17],"(ICs)":[18],"and,":[19],"therefore,":[20],"break":[21],"the":[22,32,42,70,111,129,134,143,153],"entire":[23],"system\u2019s":[24],"security.":[25],"Laser":[26],"logic":[27],"state":[28,154],"imaging":[29],"(LLSI)":[30],"from":[31],"IC":[33],"backside":[34],"is":[35,110],"an":[36,118],"example":[37],"of":[38,45,139,155],"such":[39,60],"attacks,":[40,59],"making":[41],"contactless":[43],"probing":[44,58],"static":[46],"on-die":[47],"signals":[48],"possible.":[49],"Several":[50],"have":[52,81],"been":[53],"proposed":[54],"to":[55,69,95,114,122,132,151],"prevent":[56],"optical":[57],"as":[61],"LLSI.":[62],"However,":[63],"these":[64,162],"schemes":[65],"are":[66,93],"designed":[67],"according":[68],"laser":[71,158],"properties":[72],"and":[73,78,85,97,141,171,174],"its":[74],"impact":[75],"transistors,":[77],"hence,":[79],"they":[80,92],"complex":[82],"fabrication":[83],"steps":[84],"large":[86],"area":[87],"overhead.":[88],"As":[89],"a":[90,104,137,148],"result,":[91],"difficult":[94],"verify":[96],"implement.":[98],"In":[99],"this":[100],"article,":[101],"we":[102,168],"propose":[103],"twofold":[105],"detection":[106],"self-timed":[107],"sensor,":[108],"which":[109],"first":[112],"attempt,":[113],"our":[115],"knowledge,":[116],"for":[117],"easy-to-implement":[119],"circuit-based":[120],"countermeasure":[121],"thwart":[123],"LLSI":[124,180],"attacks.":[125],"To":[126],"perform":[127],"LLSI,":[128],"attacker":[130],"needs":[131],"freeze":[133],"clock":[135],"at":[136,147],"point":[138],"interest":[140],"modulate":[142],"voltage":[144],"supply":[145],"line":[146],"known":[149],"frequency":[150],"leak":[152],"transistors":[156],"through":[157],"light":[159],"reflections.":[160],"With":[161],"two":[163],"attack":[164],"requirements":[165],"in":[166],"mind,":[167],"design,":[169],"simulate,":[170],"implement":[172],"clock-":[173],"voltage-based":[175],"sensors":[176],"that":[177],"detect":[179],"with":[182],"very":[183],"high":[184],"confidence.":[185]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}