{"id":"https://openalex.org/W4311412495","doi":"https://doi.org/10.1109/tvlsi.2022.3210252","title":"Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits","display_name":"Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits","publication_year":2022,"publication_date":"2022-10-11","ids":{"openalex":"https://openalex.org/W4311412495","doi":"https://doi.org/10.1109/tvlsi.2022.3210252"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3210252","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3210252","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022156184","display_name":"Zhufei Chu","orcid":"https://orcid.org/0000-0001-5718-4822"},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhufei Chu","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069783195","display_name":"Chuanhe Shang","orcid":null},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chuanhe Shang","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100329646","display_name":"Tingting Zhang","orcid":"https://orcid.org/0000-0002-9483-8167"},"institutions":[{"id":"https://openalex.org/I154425047","display_name":"University of Alberta","ror":"https://ror.org/0160cpw27","country_code":"CA","type":"education","lineage":["https://openalex.org/I154425047"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Tingting Zhang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Alberta, Edmonton, AB, Canada","institution_ids":["https://openalex.org/I154425047"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070614875","display_name":"Yinshui Xia","orcid":"https://orcid.org/0000-0002-3831-3876"},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yinshui Xia","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037201336","display_name":"Lunyao Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I109935558","display_name":"Ningbo University","ror":"https://ror.org/03et85d35","country_code":"CN","type":"education","lineage":["https://openalex.org/I109935558"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lunyao Wang","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, China","institution_ids":["https://openalex.org/I109935558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023734605","display_name":"Weiqiang Liu","orcid":"https://orcid.org/0000-0001-8398-8648"},"institutions":[{"id":"https://openalex.org/I9842412","display_name":"Nanjing University of Aeronautics and Astronautics","ror":"https://ror.org/01scyh794","country_code":"CN","type":"education","lineage":["https://openalex.org/I9842412"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiqiang Liu","raw_affiliation_strings":["College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China"],"affiliations":[{"raw_affiliation_string":"College of Electronic and Information Engineering, Nanjing University of Aeronautics and Astronautics, Nanjing, China","institution_ids":["https://openalex.org/I9842412"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5022156184"],"corresponding_institution_ids":["https://openalex.org/I109935558"],"apc_list":null,"apc_paid":null,"fwci":3.652,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.94012676,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":100},"biblio":{"volume":"30","issue":"12","first_page":"1827","last_page":"1839"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.903618335723877},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5823110342025757},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5585778951644897},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4953979253768921},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.48530834913253784},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47801005840301514},{"id":"https://openalex.org/keywords/stochastic-computing","display_name":"Stochastic computing","score":0.4716690480709076},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.46170786023139954},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.46077200770378113},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4601683020591736},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4233912229537964},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3908542990684509},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.33593589067459106},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.29572048783302307},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.24760064482688904},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.21610763669013977},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.1788894534111023},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11988392472267151},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11641904711723328},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09028798341751099}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.903618335723877},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5823110342025757},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5585778951644897},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4953979253768921},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.48530834913253784},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47801005840301514},{"id":"https://openalex.org/C2780971903","wikidata":"https://www.wikidata.org/wiki/Q2933705","display_name":"Stochastic computing","level":3,"score":0.4716690480709076},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.46170786023139954},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.46077200770378113},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4601683020591736},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4233912229537964},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3908542990684509},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.33593589067459106},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.29572048783302307},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.24760064482688904},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.21610763669013977},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1788894534111023},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11988392472267151},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11641904711723328},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09028798341751099},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3210252","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3210252","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8700000047683716}],"awards":[{"id":"https://openalex.org/G4070429046","display_name":null,"funder_award_id":"62022041","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4900995696","display_name":null,"funder_award_id":"61871242","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G619348379","display_name":null,"funder_award_id":"61871216","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W121999459","https://openalex.org/W1776822698","https://openalex.org/W1998824039","https://openalex.org/W2017819499","https://openalex.org/W2027884601","https://openalex.org/W2030922317","https://openalex.org/W2037187914","https://openalex.org/W2064076387","https://openalex.org/W2103490953","https://openalex.org/W2111716652","https://openalex.org/W2112796928","https://openalex.org/W2124651102","https://openalex.org/W2127974982","https://openalex.org/W2128369966","https://openalex.org/W2129394555","https://openalex.org/W2135089667","https://openalex.org/W2140975144","https://openalex.org/W2160210493","https://openalex.org/W2244005500","https://openalex.org/W2265166184","https://openalex.org/W2587513648","https://openalex.org/W2587804194","https://openalex.org/W2589986623","https://openalex.org/W2757225496","https://openalex.org/W2765733944","https://openalex.org/W2782434590","https://openalex.org/W2786771851","https://openalex.org/W2801205959","https://openalex.org/W2802516784","https://openalex.org/W2804278822","https://openalex.org/W2905212812","https://openalex.org/W2948850835","https://openalex.org/W2954164878","https://openalex.org/W2963082845","https://openalex.org/W2963122961","https://openalex.org/W2996226522","https://openalex.org/W3000426626","https://openalex.org/W3009178428","https://openalex.org/W3015392647","https://openalex.org/W3114946195","https://openalex.org/W3137454194","https://openalex.org/W3157068328","https://openalex.org/W3157484444","https://openalex.org/W4237751615","https://openalex.org/W6748224102"],"related_works":["https://openalex.org/W2203551074","https://openalex.org/W4319431600","https://openalex.org/W3213128260","https://openalex.org/W2127580684","https://openalex.org/W2768509551","https://openalex.org/W2135636985","https://openalex.org/W3089454993","https://openalex.org/W2182005210","https://openalex.org/W3023652529","https://openalex.org/W1533253004"],"abstract_inverted_index":{"Approximate":[0],"computing":[1,61],"(AC)":[2],"offers":[3],"benefits":[4],"by":[5,71,98,158],"reducing":[6,13],"the":[7,25,52,68,84,107,121,159],"requirement":[8],"for":[9],"full":[10],"accuracy,":[11],"thereby":[12],"power":[14],"consumption":[15],"and":[16,42,95,137,147],"area.":[17],"The":[18,124],"majority":[19],"logic":[20,27,90],"(ML)":[21],"gate":[22],"functions":[23],"as":[24],"fundamental":[26],"block":[28],"of":[29,54,145,154],"many":[30],"emerging":[31],"nanotechnologies.":[32],"In":[33],"this":[34],"article,":[35],"ML-based":[36,117],"arithmetic":[37],"circuits,":[38],"i.e.,":[39],"multibit":[40],"adders":[41,47],"multipliers,":[43],"are":[44,48,103,127,156],"proposed.":[45],"These":[46],"designed":[49],"to":[50,58,63,105],"prevent":[51],"propagation":[53],"inexact":[55],"carry-out":[56],"signals":[57],"higher":[59],"order":[60],"parts":[62],"enhance":[64],"accuracy.":[65],"We":[66],"implemented":[67,97],"proposed":[69,125,160],"multiplier":[70],"using":[72,130],"a":[73,132,148],"unique":[74],"partial":[75],"product":[76],"reduction":[77],"(PPR)":[78],"circuitry,":[79],"which":[80],"was":[81],"based":[82,119],"on":[83,120],"parallel":[85],"approximate":[86],"6:3":[87],"compressor.":[88],"Several":[89],"implementation":[91],"costs,":[92],"error":[93],"metrics,":[94],"layouts":[96],"quantum-dot":[99],"cellular":[100],"automata":[101],"(QCA)":[102],"analyzed":[104],"evaluate":[106],"adder":[108,161],"designs.":[109],"A":[110,140],"significant":[111],"improvement":[112],"is":[113],"observed":[114],"over":[115],"previous":[116],"designs":[118,126],"experimental":[122],"results.":[123],"further":[128],"evaluated":[129],"both":[131],"neural":[133],"network":[134],"(NN)":[135],"accelerator":[136],"image":[138],"processing.":[139],"structural":[141],"similarity":[142],"(SSIM)":[143],"value":[144,153],"1":[146],"peak":[149],"signal-to-noise":[150],"ratio":[151],"(PSNR)":[152],"infinity":[155],"achieved":[157],"design.":[162]},"counts_by_year":[{"year":2025,"cited_by_count":13},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}