{"id":"https://openalex.org/W4296437373","doi":"https://doi.org/10.1109/tvlsi.2022.3203307","title":"Design and Implementation of a Secure RISC-V Microprocessor","display_name":"Design and Implementation of a Secure RISC-V Microprocessor","publication_year":2022,"publication_date":"2022-09-19","ids":{"openalex":"https://openalex.org/W4296437373","doi":"https://doi.org/10.1109/tvlsi.2022.3203307"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3203307","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3203307","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074190672","display_name":"Kleber Stangherlin","orcid":"https://orcid.org/0000-0003-3387-054X"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Kleber Stangherlin","raw_affiliation_strings":["Electrical and Computer Engineering (ECE) Department, University of Waterloo, Waterloo, Canada"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering (ECE) Department, University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086259491","display_name":"Manoj Sachdev","orcid":"https://orcid.org/0000-0002-8256-9828"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Manoj Sachdev","raw_affiliation_strings":["Electrical and Computer Engineering (ECE) Department, University of Waterloo, Waterloo, Canada"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering (ECE) Department, University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5074190672"],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":1.379,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.84259552,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"30","issue":"11","first_page":"1705","last_page":"1715"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7493206858634949},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7344855070114136},{"id":"https://openalex.org/keywords/nist","display_name":"NIST","score":0.7133444547653198},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.652894139289856},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.6293675899505615},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5646213293075562},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5637891292572021},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.5361272096633911},{"id":"https://openalex.org/keywords/random-number-generation","display_name":"Random number generation","score":0.5356091856956482},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.5216208696365356},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.5030681490898132},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4775834381580353},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4559805989265442},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43254342675209045},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.31505072116851807},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.19308063387870789},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.17331579327583313},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14435261487960815},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1351606249809265}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7493206858634949},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7344855070114136},{"id":"https://openalex.org/C111219384","wikidata":"https://www.wikidata.org/wiki/Q6954384","display_name":"NIST","level":2,"score":0.7133444547653198},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.652894139289856},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.6293675899505615},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5646213293075562},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5637891292572021},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.5361272096633911},{"id":"https://openalex.org/C201866948","wikidata":"https://www.wikidata.org/wiki/Q228206","display_name":"Random number generation","level":2,"score":0.5356091856956482},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.5216208696365356},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.5030681490898132},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4775834381580353},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4559805989265442},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43254342675209045},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.31505072116851807},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.19308063387870789},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.17331579327583313},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14435261487960815},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1351606249809265},{"id":"https://openalex.org/C204321447","wikidata":"https://www.wikidata.org/wiki/Q30642","display_name":"Natural language processing","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3203307","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3203307","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.800000011920929,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W75082849","https://openalex.org/W83781150","https://openalex.org/W1506423869","https://openalex.org/W1517403092","https://openalex.org/W1520049216","https://openalex.org/W1543721789","https://openalex.org/W1548656471","https://openalex.org/W1549320745","https://openalex.org/W1575446397","https://openalex.org/W1580211761","https://openalex.org/W1583056432","https://openalex.org/W1592625985","https://openalex.org/W1724890242","https://openalex.org/W1873852107","https://openalex.org/W1964808141","https://openalex.org/W1985043179","https://openalex.org/W1996637381","https://openalex.org/W2014905809","https://openalex.org/W2071207516","https://openalex.org/W2144994235","https://openalex.org/W2154909745","https://openalex.org/W2219812381","https://openalex.org/W2243142522","https://openalex.org/W2318869941","https://openalex.org/W2401371495","https://openalex.org/W2534456676","https://openalex.org/W2549213854","https://openalex.org/W2591961801","https://openalex.org/W2604725724","https://openalex.org/W2784656727","https://openalex.org/W2793847091","https://openalex.org/W2806185338","https://openalex.org/W2888469969","https://openalex.org/W2900861686","https://openalex.org/W2945461167","https://openalex.org/W2987396438","https://openalex.org/W3000075903","https://openalex.org/W3110986688","https://openalex.org/W3127626522","https://openalex.org/W3153249642","https://openalex.org/W3203077206","https://openalex.org/W4226024719","https://openalex.org/W4231098049","https://openalex.org/W4243164749","https://openalex.org/W4252865489","https://openalex.org/W4296437373","https://openalex.org/W6635937959","https://openalex.org/W6641116602"],"related_works":["https://openalex.org/W5280335","https://openalex.org/W4384807855","https://openalex.org/W2164725015","https://openalex.org/W4323926098","https://openalex.org/W2022533428","https://openalex.org/W182679101","https://openalex.org/W2013165531","https://openalex.org/W2029006445","https://openalex.org/W4255075415","https://openalex.org/W169923757"],"abstract_inverted_index":{"Secret":[0],"keys":[1],"can":[2,53,75],"be":[3,32,76],"extracted":[4,140],"from":[5],"the":[6,137,141],"power":[7],"consumption":[8],"or":[9,83],"electromagnetic":[10],"emanations":[11],"of":[12,21,80],"unprotected":[13],"devices.":[14],"Traditional":[15],"countermeasures":[16],"have":[17],"a":[18,36],"limited":[19],"scope":[20],"protection":[22],"and":[23,63,74,99,119],"impose":[24],"several":[25],"restrictions":[26],"on":[27,89,129,136],"how":[28],"sensitive":[29],"data":[30],"must":[31],"manipulated.":[33],"We":[34,85],"demonstrate":[35],"bit-serial":[37],"RISC-V":[38],"microprocessor":[39,105,154],"implementation":[40,113,139],"with":[41,55,125],"no":[42,58],"plain-text":[43],"data.":[44],"All":[45],"values":[46],"are":[47],"protected":[48],"using":[49,116,147,160],"Boolean":[50],"masking.":[51],"Software":[52],"run":[54],"little":[56],"to":[57,78,157],"countermeasures,":[59],"reducing":[60],"code":[61],"size":[62,82],"performance":[64],"overheads.":[65],"Unlike":[66],"previous":[67],"literature,":[68],"our":[69,126,152],"methodology":[70],"is":[71],"fully":[72],"automated":[73],"applied":[77],"designs":[79],"arbitrary":[81],"complexity.":[84],"also":[86],"provide":[87],"details":[88],"other":[90],"key":[91,146],"components,":[92],"such":[93],"as":[94],"clock":[95],"randomizer,":[96],"memory":[97],"protection,":[98],"random":[100],"number":[101],"generator":[102],"(RNG).":[103],"The":[104,133],"was":[106,114,155],"implemented":[107],"in":[108],"65-nm":[109],"CMOS":[110],"technology.":[111],"Its":[112],"evaluated":[115],"NIST":[117,131],"tests":[118],"side-channel":[120,134],"attacks.":[121],"Random":[122],"numbers":[123],"generated":[124],"RNG":[127],"pass":[128],"all":[130],"tests.":[132],"analysis":[135],"baseline":[138],"advanced":[142],"encryption":[143],"system":[144],"(AES)":[145],"only":[148],"375":[149],"traces,":[150],"while":[151],"secure":[153],"able":[156],"withstand":[158],"attacks":[159],"20M":[161],"traces.":[162]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}