{"id":"https://openalex.org/W4293704653","doi":"https://doi.org/10.1109/tvlsi.2022.3200946","title":"A 12-Bit Current-Steering DAC With Unary- Splitting -Binary Segmented Architecture and Improved Decoding Circuit Topology","display_name":"A 12-Bit Current-Steering DAC With Unary- Splitting -Binary Segmented Architecture and Improved Decoding Circuit Topology","publication_year":2022,"publication_date":"2022-08-30","ids":{"openalex":"https://openalex.org/W4293704653","doi":"https://doi.org/10.1109/tvlsi.2022.3200946"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3200946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3200946","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080078896","display_name":"Xingyuan Tong","orcid":"https://orcid.org/0000-0002-0697-1049"},"institutions":[{"id":"https://openalex.org/I4210136859","display_name":"Xi\u2019an University of Posts and Telecommunications","ror":"https://ror.org/04jn0td46","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210136859"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xingyuan Tong","raw_affiliation_strings":["School of Electronics Engineering, Xi&#x2019;an University of Posts and Telecommunications, Xi&#x2019;an, China"],"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Xi&#x2019;an University of Posts and Telecommunications, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I4210136859"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100407508","display_name":"Dong Liu","orcid":"https://orcid.org/0000-0003-1184-3989"},"institutions":[{"id":"https://openalex.org/I4210136859","display_name":"Xi\u2019an University of Posts and Telecommunications","ror":"https://ror.org/04jn0td46","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210136859"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dong Liu","raw_affiliation_strings":["School of Electronics Engineering, Xi&#x2019;an University of Posts and Telecommunications, Xi&#x2019;an, China"],"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Xi&#x2019;an University of Posts and Telecommunications, Xi&#x2019;an, China","institution_ids":["https://openalex.org/I4210136859"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010490479","display_name":"Ronghua Wang","orcid":"https://orcid.org/0000-0003-3968-8212"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ronghua Wang","raw_affiliation_strings":["TOLL Microelectronics, Xi&#x2019;an, China"],"affiliations":[{"raw_affiliation_string":"TOLL Microelectronics, Xi&#x2019;an, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5080078896"],"corresponding_institution_ids":["https://openalex.org/I4210136859"],"apc_list":null,"apc_paid":null,"fwci":0.8141,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.67720999,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"30","issue":"10","first_page":"1391","last_page":"1400"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/unary-operation","display_name":"Unary operation","score":0.8072301149368286},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7009749412536621},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5721940994262695},{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.5593344569206238},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.49399930238723755},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3940793573856354},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36650028824806213},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3528670072555542},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.3351861536502838},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.32971519231796265},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2605742812156677},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.25095170736312866},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.17553836107254028},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13129669427871704}],"concepts":[{"id":"https://openalex.org/C78023250","wikidata":"https://www.wikidata.org/wiki/Q657596","display_name":"Unary operation","level":2,"score":0.8072301149368286},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7009749412536621},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5721940994262695},{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.5593344569206238},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.49399930238723755},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3940793573856354},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36650028824806213},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3528670072555542},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.3351861536502838},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.32971519231796265},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2605742812156677},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.25095170736312866},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.17553836107254028},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13129669427871704}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tvlsi.2022.3200946","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3200946","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3989204006","display_name":null,"funder_award_id":"61674122","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1995543218","https://openalex.org/W2005394386","https://openalex.org/W2042056852","https://openalex.org/W2048697158","https://openalex.org/W2098418255","https://openalex.org/W2112357543","https://openalex.org/W2139520010","https://openalex.org/W2140823559","https://openalex.org/W2152259556","https://openalex.org/W2344053280","https://openalex.org/W2528008983","https://openalex.org/W2615846625","https://openalex.org/W2790666456","https://openalex.org/W2892043033","https://openalex.org/W2987239577","https://openalex.org/W3002633098","https://openalex.org/W3185016119"],"related_works":["https://openalex.org/W2552855081","https://openalex.org/W2888918612","https://openalex.org/W2098920926","https://openalex.org/W2166285859","https://openalex.org/W2143048169","https://openalex.org/W3148597776","https://openalex.org/W2029461083","https://openalex.org/W1591398904","https://openalex.org/W2139520010","https://openalex.org/W2035521462"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"a":[3,52,111,167,172],"\u201cthree":[4],"unary":[5,28,58],"bits":[6,9],"+five":[7],"splitting":[8,22,71],"+":[10],"four":[11],"binary":[12,31],"bits\u201d":[13],"segmented":[14],"500-MS/s":[15],"current-steering":[16],"digital-to-analog":[17],"converter":[18],"(DAC).":[19],"The":[20,158,176,190],"proposed":[21,68,143],"decoding":[23,29,59],"method":[24],"is":[25],"between":[26],"the":[27,43,63,67,100,122,142],"and":[30,46,70,77,96,171,178,186,197,205],"decoding,":[32],"in":[33,110],"terms":[34],"of":[35,37,49,92,106,129,195,203],"number":[36],"switched":[38],"elements.":[39],"It":[40],"can":[41],"optimize":[42],"differential":[44,177],"nonlinearity":[45],"output":[47],"glitches":[48],"DAC,":[50],"with":[51,141,166],"more":[53],"simplified":[54],"circuit":[55],"scale":[56],"than":[57,81],"method.":[60],"Due":[61],"to":[62,88,99,183],"data-transmission":[64],"topology,":[65],"both":[66],"thermometer":[69],"decoders":[72,144],"feature":[73],"lower":[74],"transistor":[75],"count":[76],"occupy":[78],"less":[79],"area":[80,128],"other":[82],"competitors.":[83],"Their":[84],"low":[85],"latency":[86],"accommodates":[87],"fast":[89],"synchronization":[90],"control":[91],"current":[93],"source":[94],"switches":[95],"its":[97],"beneficial":[98],"spurious-free":[101],"dynamic":[102],"range":[103],"(SFDR)":[104],"improvement":[105],"DAC.":[107],"When":[108],"implemented":[109],"0.18-":[112],"<inline-formula":[113,131,148],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[114,132,149],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[115,133,150],"<tex-math":[116,134,151],"notation=\"LaTeX\">$\\mu":[117,135,152],"\\text{m}$":[118,138,155],"</tex-math></inline-formula>":[119,139,156],"CMOS":[120],"process,":[121],"12-bit":[123],"DAC":[124,159,191],"occupies":[125],"an":[126],"active":[127],"536":[130],"\\text{m}\\,\\,\\times":[136,153],"\\,\\,340\\,\\,\\mu":[137],",":[140],"occupying":[145],"only":[146],"28":[147],"\\,\\,75\\,\\,\\mu":[154],".":[157],"dissipates":[160],"17.20":[161],"mW":[162],"at":[163],"500":[164],"MS/s":[165],"1.8-V":[168],"analog":[169],"supply":[170],"1.2-V":[173],"digital":[174],"supply.":[175],"integral":[179],"nonlinearities":[180],"are":[181],"measured":[182],"be":[184],"0.28":[185],"1.16":[187],"LSB,":[188],"respectively.":[189,208],"also":[192],"features":[193],"SFDRs":[194],"68.83":[196],"62.06":[198],"dB":[199],"for":[200],"input":[201],"signals":[202],"6.34":[204],"239.74":[206],"MHz,":[207]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2}],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-10-10T00:00:00"}