{"id":"https://openalex.org/W4285308893","doi":"https://doi.org/10.1109/tvlsi.2022.3171810","title":"Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches","display_name":"Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches","publication_year":2022,"publication_date":"2022-05-18","ids":{"openalex":"https://openalex.org/W4285308893","doi":"https://doi.org/10.1109/tvlsi.2022.3171810"},"language":"en","primary_location":{"id":"doi:10.1109/tvlsi.2022.3171810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3171810","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://ris.utwente.nl/ws/files/280848231/10.1109_tvlsi.2022.3171810.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013491522","display_name":"Kerem Arikan","orcid":null},"institutions":[{"id":"https://openalex.org/I13236232","display_name":"TOBB University of Economics and Technology","ror":"https://ror.org/03ewx7v96","country_code":"TR","type":"education","lineage":["https://openalex.org/I13236232"]}],"countries":["TR"],"is_corresponding":true,"raw_author_name":"Kerem Arikan","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, TOBB University of Economics and Technology, Ankara, Turkey"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, TOBB University of Economics and Technology, Ankara, Turkey","institution_ids":["https://openalex.org/I13236232"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002174526","display_name":"Alessandro Palumbo","orcid":"https://orcid.org/0000-0002-0034-6189"},"institutions":[{"id":"https://openalex.org/I116067653","display_name":"University of Rome Tor Vergata","ror":"https://ror.org/02p77k626","country_code":"IT","type":"education","lineage":["https://openalex.org/I116067653"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Palumbo","raw_affiliation_strings":["Dipartimento di Elettronica, Ingegneria dell’Informazione, Università degli Studi di Roma Tor Vergata, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Ingegneria dell’Informazione, Università degli Studi di Roma Tor Vergata, Rome, Italy","institution_ids":["https://openalex.org/I116067653"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007108808","display_name":"Luca Cassano","orcid":"https://orcid.org/0000-0003-3824-7714"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Cassano","raw_affiliation_strings":["Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080322790","display_name":"Pedro Reviriego","orcid":"https://orcid.org/0000-0003-2540-5234"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro Reviriego","raw_affiliation_strings":["Departamento de Ingeniería Telemática, Universidad Carlos III de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Departamento de Ingeniería Telemática, Universidad Carlos III de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010562631","display_name":"Salvatore Pontarelli","orcid":"https://orcid.org/0000-0002-3626-6404"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Pontarelli","raw_affiliation_strings":["Dipartimento di Informatica, Università di Roma La Sapienza, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Informatica, Università di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007176500","display_name":"Giuseppe Bianchi","orcid":"https://orcid.org/0000-0001-7277-7423"},"institutions":[{"id":"https://openalex.org/I4210099310","display_name":"Consorzio Nazionale Interuniversitario per le Telecomunicazioni","ror":"https://ror.org/0182a5n39","country_code":"IT","type":"funder","lineage":["https://openalex.org/I4210099310"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Bianchi","raw_affiliation_strings":["Dipartimento di Elettronica, Ingegneria dell’Informazione, CNIT (Consorzio Nazionale Iteruniversitario per le Telecomunicazioni), Università degli Studi di Roma Tor Vergata, Rome, Italy","CNIT - Consorzio Nazionale Interuniversitario per le Telecomunicazioni [Roma] (CNIT (National Inter-University Consortium for Telecommunications) Viale G. P. Usberti, 181/A Pal.3 - 43124 Parma (PR) - Italy)"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Ingegneria dell’Informazione, CNIT (Consorzio Nazionale Iteruniversitario per le Telecomunicazioni), Università degli Studi di Roma Tor Vergata, Rome, Italy","institution_ids":["https://openalex.org/I4210099310"]},{"raw_affiliation_string":"CNIT - Consorzio Nazionale Interuniversitario per le Telecomunicazioni [Roma] (CNIT (National Inter-University Consortium for Telecommunications) Viale G. P. Usberti, 181/A Pal.3 - 43124 Parma (PR) - Italy)","institution_ids":["https://openalex.org/I4210099310"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052707216","display_name":"O\u011fuz Ergin","orcid":"https://orcid.org/0000-0003-2701-3787"},"institutions":[{"id":"https://openalex.org/I13236232","display_name":"TOBB University of Economics and Technology","ror":"https://ror.org/03ewx7v96","country_code":"TR","type":"education","lineage":["https://openalex.org/I13236232"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Oguz Ergin","raw_affiliation_strings":["Department of Computer Engineering, TOBB University of Economics and Technology, Ankara, Turkey"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, TOBB University of Economics and Technology, Ankara, Turkey","institution_ids":["https://openalex.org/I13236232"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048232172","display_name":"Marco Ottavi","orcid":"https://orcid.org/0000-0002-5064-7342"},"institutions":[{"id":"https://openalex.org/I4210099310","display_name":"Consorzio Nazionale Interuniversitario per le Telecomunicazioni","ror":"https://ror.org/0182a5n39","country_code":"IT","type":"funder","lineage":["https://openalex.org/I4210099310"]},{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["IT","NL"],"is_corresponding":false,"raw_author_name":"Marco Ottavi","raw_affiliation_strings":["Dipartimento di Elettronica, Ingegneria dell’Informazione, CNIT (Consorzio Nazionale Iteruniversitario per le Telecomunicazioni), Università degli Studi di Roma Tor Vergata, Rome, Italy","University of Twente (Drienerlolaan 5, 7522 NB Enschede - Netherlands)"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica, Ingegneria dell’Informazione, CNIT (Consorzio Nazionale Iteruniversitario per le Telecomunicazioni), Università degli Studi di Roma Tor Vergata, Rome, Italy","institution_ids":["https://openalex.org/I4210099310"]},{"raw_affiliation_string":"University of Twente (Drienerlolaan 5, 7522 NB Enschede - Netherlands)","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5013491522"],"corresponding_institution_ids":["https://openalex.org/I13236232"],"apc_list":null,"apc_paid":null,"fwci":3.1714,"has_fulltext":true,"cited_by_count":23,"citation_normalized_percentile":{"value":0.92734491,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"30","issue":"7","first_page":"938","last_page":"951"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9897000193595886,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11241","display_name":"Advanced Malware Detection Techniques","score":0.9818999767303467,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8282970190048218},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.7277778387069702},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6762523055076599},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6504659652709961},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6189138293266296},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5149096250534058},{"id":"https://openalex.org/keywords/orchestration","display_name":"Orchestration","score":0.48530906438827515},{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.44616925716400146},{"id":"https://openalex.org/keywords/branch-predictor","display_name":"Branch predictor","score":0.42795437574386597},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3910709321498871},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.3586519956588745}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8282970190048218},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.7277778387069702},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6762523055076599},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6504659652709961},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6189138293266296},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5149096250534058},{"id":"https://openalex.org/C199168358","wikidata":"https://www.wikidata.org/wiki/Q3367000","display_name":"Orchestration","level":3,"score":0.48530906438827515},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.44616925716400146},{"id":"https://openalex.org/C168522837","wikidata":"https://www.wikidata.org/wiki/Q679552","display_name":"Branch predictor","level":2,"score":0.42795437574386597},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3910709321498871},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.3586519956588745},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C558565934","wikidata":"https://www.wikidata.org/wiki/Q2743","display_name":"Musical","level":2,"score":0.0}],"mesh":[],"locations_count":6,"locations":[{"id":"doi:10.1109/tvlsi.2022.3171810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tvlsi.2022.3171810","pdf_url":null,"source":{"id":"https://openalex.org/S37538908","display_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","issn_l":"1063-8210","issn":["1063-8210","1557-9999"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","raw_type":"journal-article"},{"id":"pmh:oai:ris.utwente.nl:publications/8d1cde19-28f4-4662-9263-c19f349f0752","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/8d1cde19-28f4-4662-9263-c19f349f0752","pdf_url":"https://ris.utwente.nl/ws/files/280848231/10.1109_tvlsi.2022.3171810.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"Arikan, K, Palumbo, A, Cassano, L, Reviriego, P, Pontarelli, S, Bianchi, G, Ergin, O & Ottavi, M 2022, 'Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches', IEEE transactions on very large scale integration (VLSI) systems, vol. 30, no. 7, pp. 938-951. https://doi.org/10.1109/TVLSI.2022.3171810","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:HAL:hal-04685438v1","is_oa":true,"landing_page_url":"https://hal.science/hal-04685438","pdf_url":null,"source":{"id":"https://openalex.org/S4406922466","display_name":"SPIRE - Sciences Po Institutional REpository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2022, 30, pp.938 - 951. ⟨10.1109/tvlsi.2022.3171810⟩","raw_type":"Journal articles"},{"id":"pmh:oai:art.torvergata.it:2108/303089","is_oa":false,"landing_page_url":"https://hdl.handle.net/2108/303089","pdf_url":null,"source":{"id":"https://openalex.org/S4306400993","display_name":"Cineca Institutional Research Information System (Tor Vergata University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I116067653","host_organization_name":"University of Rome Tor Vergata","host_organization_lineage":["https://openalex.org/I116067653"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1674467","is_oa":false,"landing_page_url":"https://hdl.handle.net/11573/1674467","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:re.public.polimi.it:11311/1231738","is_oa":false,"landing_page_url":"https://hdl.handle.net/11311/1231738","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:ris.utwente.nl:publications/8d1cde19-28f4-4662-9263-c19f349f0752","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/8d1cde19-28f4-4662-9263-c19f349f0752","pdf_url":"https://ris.utwente.nl/ws/files/280848231/10.1109_tvlsi.2022.3171810.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"Arikan, K, Palumbo, A, Cassano, L, Reviriego, P, Pontarelli, S, Bianchi, G, Ergin, O & Ottavi, M 2022, 'Processor Security: Detecting Microarchitectural Attacks via Count-Min Sketches', IEEE transactions on very large scale integration (VLSI) systems, vol. 30, no. 7, pp. 938-951. https://doi.org/10.1109/TVLSI.2022.3171810","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4285308893.pdf","grobid_xml":"https://content.openalex.org/works/W4285308893.grobid-xml"},"referenced_works_count":42,"referenced_works":["https://openalex.org/W58308990","https://openalex.org/W1480815770","https://openalex.org/W1488058190","https://openalex.org/W1523982624","https://openalex.org/W1603169531","https://openalex.org/W2022869924","https://openalex.org/W2034195502","https://openalex.org/W2056778557","https://openalex.org/W2073524356","https://openalex.org/W2080234606","https://openalex.org/W2097778649","https://openalex.org/W2128255161","https://openalex.org/W2132064685","https://openalex.org/W2146573211","https://openalex.org/W2147150814","https://openalex.org/W2166293920","https://openalex.org/W2172060328","https://openalex.org/W2302098303","https://openalex.org/W2503694756","https://openalex.org/W2522718524","https://openalex.org/W2611887307","https://openalex.org/W2734814518","https://openalex.org/W2768516003","https://openalex.org/W2773262951","https://openalex.org/W2903910116","https://openalex.org/W2904482304","https://openalex.org/W2912019959","https://openalex.org/W2933686492","https://openalex.org/W2963311060","https://openalex.org/W2963739369","https://openalex.org/W2979328258","https://openalex.org/W3022895293","https://openalex.org/W3045670632","https://openalex.org/W3083668898","https://openalex.org/W3094333455","https://openalex.org/W3116954090","https://openalex.org/W3134254769","https://openalex.org/W3208279905","https://openalex.org/W4245276998","https://openalex.org/W6628261430","https://openalex.org/W6634823185","https://openalex.org/W6790608898"],"related_works":["https://openalex.org/W1916582918","https://openalex.org/W4235677263","https://openalex.org/W2381374827","https://openalex.org/W2109440006","https://openalex.org/W2745771918","https://openalex.org/W1970479385","https://openalex.org/W1547865754","https://openalex.org/W2276000909","https://openalex.org/W2121217620","https://openalex.org/W1558760591"],"abstract_inverted_index":{"The":[0,112,153],"continuous":[1,77],"quest":[2],"for":[3,101],"performance":[4],"pushed":[5],"processors":[6],"to":[7,53,115,117,168,182,223],"incorporate":[8],"elements":[9],"such":[10],"as":[11],"multiple":[12],"cores,":[13],"caches,":[14],"acceleration":[15],"units,":[16],"or":[17,47,56],"speculative":[18,48],"execution":[19,49],"that":[20,35,177],"make":[21],"systems":[22,62],"very":[23],"complex.":[24],"On":[25],"the":[26,41,76,84,106,118,126,134,147,151,172,175,178,186,204,217,227],"other":[27],"hand,":[28],"these":[29],"features":[30],"often":[31],"expose":[32],"unexpected":[33],"vulnerabilities":[34],"pose":[36],"new":[37,80,95],"challenges.":[38],"For":[39],"example,":[40],"timing":[42],"differences":[43],"introduced":[44],"by":[45,75,109],"caches":[46],"can":[50,156],"be":[51,157],"exploited":[52],"leak":[54],"information":[55],"detect":[57,224],"activity":[58,149],"patterns.":[59],"Protecting":[60],"embedded":[61,110],"from":[63],"existing":[64],"attacks":[65,82,104,176],"is":[66,71,114,180],"extremely":[67],"challenging,":[68],"and":[69,86,137,139,194,208,233,243],"it":[70],"made":[72],"even":[73],"harder":[74],"rise":[78],"of":[79,132,150,174,203,226],"microarchitectural":[81,103],"(e.g.,":[83],"Spectre":[85],"Orchestration":[87],"attacks).":[88],"In":[89,213],"this":[90],"article,":[91],"we":[92,195],"present":[93],"a":[94,120,190],"approach":[96,155,188,219],"based":[97],"on":[98],"count-min":[99],"sketches":[100],"detecting":[102,200],"in":[105,130,166,189,199],"microprocessors":[107],"featured":[108],"systems.":[111],"idea":[113],"add":[116],"system":[119],"security":[121],"checking":[122],"module":[123],"(without":[124],"modifying":[125],"microprocessor":[127],"under":[128],"protection)":[129],"charge":[131],"observing":[133],"fetched":[135],"instructions":[136],"identifying":[138],"signaling":[140],"possible":[141],"suspicious":[142],"activities":[143],"without":[144,244],"interfering":[145],"with":[146,229],"nominal":[148],"system.":[152],"proposed":[154,187,218],"programmed":[158],"at":[159],"design":[160],"time":[161],"(and":[162],"reprogrammed":[163],"after":[164],"deployment)":[165],"order":[167],"always":[169],"keep":[170],"updated":[171],"list":[173],"checker":[179],"able":[181,222],"identify.":[183],"We":[184],"integrated":[185],"large":[191],"RISC-V":[192],"core,":[193],"proved":[196],"its":[197,214],"effectiveness":[198],"several":[201],"versions":[202],"Spectre,":[205],"Orchestration,":[206],"Rowhammer,":[207],"Flush":[209],"+":[210],"Reload":[211],"attacks.":[212],"best":[215],"configuration,":[216],"has":[220],"been":[221],"100%":[225],"attacks,":[228],"no":[230],"false":[231],"alarms":[232],"introducing":[234],"about":[235,239],"10%":[236],"area":[237],"overhead,":[238],"4%":[240],"power":[241],"increase,":[242],"working":[245],"frequency":[246],"reduction.":[247]},"counts_by_year":[{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":10},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-03-28T08:17:26.163206","created_date":"2022-07-14T00:00:00"}